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AM29SL400C Datasheet(PDF) 3 Page - Advanced Micro Devices

Part No. AM29SL400C
Description  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
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Maker  AMD [Advanced Micro Devices]
Homepage  http://www.amd.com
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AM29SL400C Datasheet(HTML) 3 Page - Advanced Micro Devices

 
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DATA SHEET
This Data Sheet states AMD’s current specifications regarding the Products described herein. This Data Sheet may
be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# Am29SL400C_00 Rev: A
Amendment: 6 Issue Date: January 23, 2007
Am29SL400C
4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8
Volt-only Super Low Voltage Flash Memory
Distinctive Characteristics
■ Single power supply operation
— 1.65 to 2.2 V for read, program, and erase operations
— Ideal for battery-powered applications
■ Manufactured on 0.32 µm process technology
■ High performance
— Access times as fast as 100 ns
■ Ultra low power consumption (typical values at
5 MHz)
— 1 µA Automatic Sleep Mode current
— 1 µA standby mode current
— 5 mA read current
— 20 mA program/erase current
■ Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and seven
64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and seven
32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to prevent any
program or erase operations within that sector
Sectors can be locked in-system or via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■ Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
■ Top or bottom boot block configurations
available
■ Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically writes
and verifies data at specified addresses
■ Minimum 1,000,000 erase cycle guarantee per
sector
■ 20-year data retention at 125°C
■ Package option
— 48-ball FBGA
— 48-pin TSOP
■ Compatibility with JEDEC standards
— Pinout and software compatible with single-power
supply Flash
— Superior inadvertent write protection
■ Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
■ Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or
erase cycle completion
■ Erase Suspend/Erase Resume
— Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array
data


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