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74F112 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. 74F112
Description  Dual JK Negative Edge-Triggered Flip-Flop
Download  7 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74F112 Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics
AC Operating Requirements
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
fMAX
Maximum Clock Frequency
85
105
80
MHz
tPLH
Propagation Delay
2.0
5.0
6.5
2.0
7.5
ns
tPHL
CPn to Qn or Qn
2.0
5.0
6.5
2.0
7.5
tPLH
Propagation Delay
2.0
4.5
6.5
2.0
7.5
ns
tPHL
CDn, SDn to Qn, Qn
2.0
4.5
6.5
2.0
7.5
Symbol
Parameter
TA = +25°CTA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
Min
Max
Min
Max
tS(H)
Setup Time, HIGH or LOW
4.0
5.0
ns
tS(L)
Jn or Kn to CPn
3.0
3.5
tH(H)
Hold Time, HIGH or LOW
0
0
tH(L)
Jn or Kn to CPn
00
tW(H)
CP Pulse Width
4.5
5.0
ns
tW(L)
HIGH or LOW
4.5
5.0
tW(L)
Pulse Width, LOW
4.5
5.0
ns
CDn or SDn
tREC
Recovery Time
4.0
5.0
ns
SDn, CDn to CP


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