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74AC74 Datasheet(PDF) 5 Page - Fairchild Semiconductor

Part No. 74AC74
Description  Dual D-Type Positive Edge-Triggered Flip-Flop
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74AC74 Datasheet(HTML) 5 Page - Fairchild Semiconductor

 
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DC Electrical Characteristics for ACT
Note 7: All outputs loaded; thresholds on input associated with output under test.
Note 8: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Note 9: Voltage Range 3.3 is 3.3V
r 0.3V
Voltage Range 5.0 is 5.0V
r 0.5V
Symbol
Parameter
VCC
TA 25qCTA 40qC to 85qC
Units
Conditions
(V)
Typ
Guaranteed Limits
VIH
Minimum HIGH Level
4.5
1.5
2.0
2.0
V
VOUT
0.1V
Input Voltage
5.5
1.5
2.0
2.0
or VCC  0.1V
VIL
Maximum LOW Level
4.5
1.5
0.8
0.8
V
VOUT 0.1V
Output Voltage
5.5
1.5
0.8
0.8
or VCC  0.1V
VOH
Minimum HIGH Level
4.5
4.49
4.4
4.4
V
IOUT 50 PA
Output Voltage
5.5
5.49
5.4
5.4
VIN VIL or VIH
4.5
3.86
3.76
V
IOH 24 mA
5.5
4.86
4.76
IOH 24 mA (Note 7)
VOL
Maximum LOW Level
4.5
0.001
0.1
0.1
V
IOUT 50 PA
Output Voltage
5.5
0.001
0.1
0.1
VIN VIL or VIH
4.5
0.36
0.44
V
IOL 24 mA
5.5
0.36
0.44
IOL 24 mA (Note 7)
IIN
Maximum Input
5.5
r0.1
r1.0
PA
VI VCC, GND
Leakage Current
ICCT
Maximum
5.5
0.6
1.5
mA
VI VCC  2.1V
ICC/Input
IOLD
Minimum Dynamic
5.5
75
mA
VOLD 1.65V Maximum
IOHD
Output Current (Note 8)
5.5
75
mA
VOHD 3.85V Minimum
ICC
Maximum Quiescent
5.5
2.0
20.0
PA
VIN VCC
Supply Current
or GND
VCC
TA 25qCTA 40qC to 85qC
Symbol
Parameter
(V)
CL 50 pF
CL 50 pF
Units
(Note 9)
Min
Typ
Max
Min
Max
fMAX
Maximum Clock
3.3
100
125
95
MHz
Frequency
5.0
140
160
125
tPLH
Propagation Delay
3.3
3.5
8.0
12.0
2.5
13.0
ns
CDn or SDn to Qn or Qn
5.0
2.5
6.0
9.0
2.0
10.0
tPHL
Propagation Delay
3.3
4.0
10.5
12.0
3.5
13.5
ns
CDn or SDn to Qn or Qn
5.0
3.0
8.0
9.5
2.5
10.5
tPLH
Propagation Delay
3.3
4.5
8.0
13.5
4.0
16.0
ns
CPn to Qn or Qn
5.0
3.5
6.0
10.0
3.0
10.5
tPHL
Propagation Delay
3.3
3.5
8.0
14.0
3.5
14.5
ns
CPn to Qn or Qn
5.0
2.5
6.0
10.0
2.5
10.5


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