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LAN9115 Datasheet(PDF) 92 Page - SMSC Corporation |
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LAN9115 Datasheet(HTML) 92 Page - SMSC Corporation |
92 / 131 page Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller Datasheet Revision 1.1 (05-17-05) 92 SMSC LAN9115 DATASHEET 5.3.22 AFC_CFG – Automatic Flow Control Configuration Register This register configures the mechanism that controls both the automatic, and software-initiated transmission of pause frames and back pressure. Note: The LAN9115 will not transmit pause frames or assert back pressure if the transmitter is disabled. Offset: ACh Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:24 Reserved RO - 23:16 Automatic Flow Control High Level (AFC_HI). Specifies, in multiples of 64 bytes, the level at which flow control will trigger. When this limit is reached the chip will apply back pressure or will transmit a pause frame as programmed in bits [3:0] of this register. During full-duplex operation only a single pause frame is transmitted when this level is reached. The pause time transmitted in this frame is programmed in the FCPT field of the FLOW register in the MAC CSR space. During half-duplex operation each incoming frame that matches the criteria in bits [3:0] of this register will be jammed for the period set in the BACK_DUR field. R/W 00h 15:8 Automatic Flow Control Low Level (AFC_LO). Specifies, in multiples of 64 bytes, the level at which a pause frame is transmitted with a pause time setting of zero. When the amount of data in the RX data FIFO falls below this level the pause frame is transmitted. A pause time value of zero instructs the other transmitting device to immediately resume transmission. The zero time pause frame will only be transmitted if the RX data FIFO had reached the AFC_HI level and a pause frame was sent. A zero pause time frame is sent whenever automatic flow control in enabled in bits [3:0] of this register. Note: When automatic flow control is enabled the AFC_LO setting must always be less than the AFC_HI setting. R/W 00h 7:4 Backpressure Duration (BACK_DUR). When the LAN9115 automatically asserts back pressure, it will be asserted for this period of time. This field has no function and is not used in full-duplex mode. Please refer to Table 5.5, describing Backpressure Duration bit mapping for more information. R/W 0h 3 Flow Control on Multicast Frame (FCMULT). When this bit is set, the LAN9115 will assert back pressure when the AFC level is reached and a multicast frame is received. This field has no function in full-duplex mode. R/W 0 2 Flow Control on Broadcast Frame (FCBRD). When this bit is set, the LAN9115 will assert back pressure when the AFC level is reached and a broadcast frame is received. This field has no function in full-duplex mode. R/W 0 1 Flow Control on Address Decode (FCADD). When this bit is set, the LAN9115 will assert back pressure when the AFC level is reached and a frame addressed to the LAN9115 is received. This field has no function in full-duplex mode. R/W 0 |
Similar Part No. - LAN9115_05 |
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Similar Description - LAN9115_05 |
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