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EMC2300 Datasheet(PDF) 70 Page - SMSC Corporation

Part No. EMC2300
Description  Fan Control Device with High Frequency PWM and Temperature Monitors
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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EMC2300 Datasheet(HTML) 70 Page - SMSC Corporation

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Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
Revision 0.2 (06-14-06)
70
SMSC EMC2300
DATASHEET
8.2.24
Register 81h: TACH_PWM Association Register
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
This register is used to associate a PWM with a tachometer input. This association is used by the fan
logic to determine when to prevent a bit from being set in the interrupt status registers.
The fan tachometer will not cause a bit to be set in the interrupt status register:
g. if the current value in Current PWM Duty registers is 00h or
h. if the fan is disabled via the Fan Configuration Register.
Note: A bit will never be set in the interrupt status for a fan if its tachometer minimum is set to FFFFh.
See bit definition below.
Table 8.45 Interrupt Enable 2 Register Bits
BIT
NAME
R/W DEFAULT
DESCRIPTION
0
TACH
R
0
Group TACH INT# enable- When set enables out-of-limit TACH
measurements assert the INT# pin.
1
TACH1
R
1
When set, enables the TACH1 tachometer to update status registers and
generate interrupts.
2
TACH2
R
1
When set, enables the TACH2 tachometer to update status registers and
generate interrupts.
3
TACH3
R
1
When set, enables the TACH3 tachometer to update status registers and
generate interrupts.
4
TACH4
R
1
When set, enables the TACH4 tachometer to update status registers and
generate interrupts.
5
RES
R/W
0
Reserved
6
RES
R/W
0
Reserved
7
RES
R/W
0
Reserved
Table 8.46 Register 81h: TACH_PWM Association Register
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
81h
R/W
TACH_PWM Association
T4H
T4L
T3H
T3L
T2H
T2L
T1H
T1L
A4h
Table 8.47 TACH_PWM Association Register Bits
BIT
NAME
R/W DEFAULT
DESCRIPTION
0
T1L
R/W
0
Determine which PWM outputs are associated with the TACH1 input. See
Table 8.48
1
T1H
R/W
0
2
T2L
R/W
1
Determine which PWM outputs are associated with the TACH2 input. See
Table 8.48
3
T2H
R/W
0
4
T3L
R/W
0
Determine which PWM outputs are associated with the TACH3 input. See
Table 8.48
5
T3H
R/W
1
6
T4L
R/W
0
Determine which PWM outputs are associated with the TACH4 input. See
Table 8.48
7
T4H
R/W
1


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