Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

EMC2300 Datasheet(PDF) 68 Page - SMSC Corporation

Part No. EMC2300
Description  Fan Control Device with High Frequency PWM and Temperature Monitors
Download  81 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
Logo 

EMC2300 Datasheet(HTML) 68 Page - SMSC Corporation

Zoom Inzoom in Zoom Outzoom out
 68 / 81 page
background image
Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
Revision 0.2 (06-14-06)
68
SMSC EMC2300
DATASHEET
8.2.21
Register 7Eh: Interrupt Enable 1 Register
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register is used to enable individual voltage error events to set the corresponding status bits in
the interrupt status registers. This register also contains the group voltage enable bit (Bit[0] VOLT),
which is used to enable voltage events to force the interrupt pin (INT#) low if interrupts are enabled
(see Bit[2] INTEN of the Special Function register at offset 7Ch).
See Figure 6.3 Interrupt Control on page 24.
This register contains the following bits:
8.2.22
Register 7Fh: Configuration Register
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Table 8.40 Register 7Eh: Interrupt Enable 1 Register
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
7Eh
R/W
Interrupt Enable 1 (Voltages)
VCC
RES
RES
RES
VCCP
RES
RES
VOLT
ECh
Table 8.41 Interrupt Enable 1 Register bits
BIT
NAME
R/W DEFAULT
DESCRIPTION
0
VOLT
R/W
0
Group INT# Voltage Enable - when set, enables out-of-limit voltages to
drive the INT# pin low (provided that the INTEN bit in the Special Function
register is also set).
1
Reserved
R/W
0
Reserved
2
Reserved
R/W
1
Reserved
3
VCCP
R/W
1
When set Enables VCCP Channel to update status registers and
generate interrupts
4
Reserved
R/W
0
Reserved
5
Reserved
R/W
1
Reserved
6
Reserved
R/W
1
Reserved
7
VCC
R/W
1
When set, enables VCC channel to update status registers and generate
interrupts.
Table 8.42 Register 7Fh: Configuration Register
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
7Fh
R/W
Configuration
INIT
SMSC
SMSC
SUREN
TRDY
RES
P2INT
T3INT
10h


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn