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EMC2300 Datasheet(PDF) 57 Page - SMSC Corporation

Part No. EMC2300
Description  Fan Control Device with High Frequency PWM and Temperature Monitors
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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EMC2300 Datasheet(HTML) 57 Page - SMSC Corporation

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Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
SMSC EMC2300
57
Revision 0.2 (06-14-06)
DATASHEET
Note: Clearing the individual enable bits.
1. An interrupt status bit will never change from a 0 to a 1 when the corresponding individual interrupt
enable bit is cleared (set to 0), regardless of whether the limits are violated during a measurement.
2. If the individual enable bit is cleared while the associated status bit is 1, the status bit will be
cleared when the associated reading register is updated. The reading registers only get updated
when the START bit is set to ‘1’. If the enable bit is cleared when the START bit is 0, the associated
interrupt status bit will not be cleared until the start bit is set to 1 and the associated reading register
is updated.
8.2.10
Registers 44-4Dh: Voltage Limit Registers
Setting the Lock bit has no effect on these registers.
If a voltage input either exceeds the value set in the voltage high limit register or falls below or equals
the value set in the voltage low limit register, the corresponding bit will be set automatically by the
EMC2300
in the interrupt status registers (41-42h). Voltages are presented in the registers at ¾ full
scale for the nominal voltage, meaning that at nominal voltage, each input will be C0h, as shown in
Table 8.18.
Table 8.16 Interrupt Status Register 2
BIT
NAME
R/W
DEFAULT
DESCRIPTION
0
Reserved
R
0
Reserved
1
Reserved
R
0
Reserved
2
TACH1
Slow/Stalled
R
0
The EMC2300 automatically sets this bit to 1 when the TACH1 input
reading is above the value set in the Tach1 Minimum MSB and LSB
registers.
3
TACH2
Slow/Stalled
R
0
The EMC2300 automatically sets this bit to 1 when the TACH2 input
reading is above the value set in the Tach2 Minimum MSB and LSB
registers.
4
TACH3
Slow/Stalled
R
0
The EMC2300 automatically sets this bit to 1 when the TACH3 input
reading is above the value set in the Tach3 Minimum MSB and LSB
registers.
5
TACH4
Slow/Stalled
R
0
The EMC2300 automatically sets this bit to 1 when the TACH4 input
reading is above the value set in the Tach4 Minimum MSB and LSB
registers.
6
Remote
Diode 1 Fault
R
0
The EMC2300 automatically sets this bit to 1 when there is either a short
or open circuit fault on the Remote1+ or Remote1- thermal diode input
pins as defined in the section Diode Fault on page 24.
Note:
If the START bit is set and a fault condition exists, the Remote
Diode 1 reading register will be forced to 80h.
7
Remote
Diode 2 Fault
R
0
The EMC2300 automatically sets this bit to 1 when there is either a short
or open circuit fault on the Remote2+ or Remote2- thermal diode input
pins as defined in the section Diode Fault on page 24.
Note:
If the START bit is set and a fault condition exists, the Remote
Diode 2 reading register will be forced to 80h.
Table 8.17 Registers 44-4Dh: Voltage Limit Registers
Register
Address
Read/
Write
Register Name
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
46h
R/W
Vccp Low Limit
7
6
5
4
3
2
1
0
00h
47h
R/W
Vccp High Limit
7
6
5
4
3
2
1
0
FFh
48h
R/W
VCC Low Limit
7
6
5
4
3
2
1
0
00h
49h
R/W
VCC High Limit
7
6
5
4
3
2
1
0
FFh


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