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EMC2300 Datasheet(PDF) 47 Page - SMSC Corporation

Part No. EMC2300
Description  Fan Control Device with High Frequency PWM and Temperature Monitors
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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EMC2300 Datasheet(HTML) 47 Page - SMSC Corporation

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60h
R/W
Zone 2 Range/PWM 2 Frequency
RAN3
RAN2
RAN1
RAN0
FRQ3
FRQ2
FRQ1
FRQ0
C3h
Yes
No
61h
R/W
Zone 3 Range/PWM 3 Frequency
RAN3
RAN2
RAN1
RAN0
FRQ3
FRQ2
FRQ1
FRQ0
C3h
Yes
No
62h
R/W
PWM1 Ramp Rate Control
RES
RES
RES
RES
RR1E
RR1-2
RR1-1
RR1-0
E0h
Yes
No
63h
R/W
PWM 2, PWM3 Ramp Rate Control
RR2E
RR2-2
RR2-1
RR2-0
RR3E
RR3-2
RR3-1
RR3-0
00h
Yes
No
64h
R/W
PWM 1 MINIMUM Duty Cycle
7
6
5
4
3
2
1
0
80h
Yes
No
65h
R/W
PWM 2 MINIMUM Duty Cycle
7
6
5
4
3
2
1
0
80h
Yes
No
66h
R/W
PWM 3 MINIMUM Duty Cycle
7
6
5
4
3
2
1
0
80h
Yes
No
67h
R/W
Zone 1 Low Temp Limit
7
6
5
4
3
2
1
0
80h
Yes
No
68h
R/W
Zone 2 Low Temp Limit
7
6
5
4
3
2
1
0
80h
Yes
No
69h
R/W
Zone 3 Low Temp Limit
7
6
5
4
3
2
1
0
80h
Yes
No
6Ah
R/W
Zone 1 Temp Absolute Limit
7
6
5
4
3
2
1
0
64h
Yes
No
6Bh
R/W
Zone 2 Temp Absolute Limit
7
6
5
4
3
2
1
0
64h
Yes
No
6Ch
R/W
Zone 3 Temp Absolute Limit
7
6
5
4
3
2
1
0
64h
Yes
No
6Fh
R/W
XOR Test Tree Enable
RES
RES
RES
RES
RES
RES
RES
XEN
00h
Yes
No
7Ch
R/W
Note 8.4
Special Function Register
AVG2
AVG1
AVG0
SMSC
Note 8.7
SMSC
Note 8.7
INTEN
MON-MD
LPMD
Note 8.5
40h
Yes
Note 8.4
No
7Dh
R
Reserved
RES
RES
RES
RES
RES
RES
RES
RES
00h
No
No
7Eh
R/W
Interrupt Enable 1 (Voltages)
VCC
RES
RES
RES
VCCP
RES
RES
VOLT
ECh
Yes
No
7Fh
R/W
Configuration
INIT
SMSC
Note 8.7
SMSC
Note 8.7
SUREN
TRDY
RES
P2INT
T3INT
10h
Yes
No
80h
R/W
Interrupt Enable 2 (Fan Tachs)
RES
RES
RES
TACH4
TACH3
TACH2
TACH1
TACH
1Eh
Yes
No
81h
R/W
TACH_PWM Association
T4H
T4L
T3H
T3L
T2H
T2L
T1H
T1L
A4h
Yes
No
82h
R/W
Interrupt Enable 3 (Temp)
RES
RES
RES
RES
D2EN
D1EN
AMB
TEMP
0Eh
Yes
No
85h
R
A/D Converter LSbs Reg 1
RD2.3
RD2.2
RD2.1
RD2.0
RD1.3
RD1.2
RD1.1
RD1.0
N/A
No
No
86h
R
A/D Converter LSbs Reg 2
RES
RES
RES
RES
AM.3
AM.2
AM.1
AM.0
N/A
No
No
87h
R
A/D Converter LSbs Reg 3
RES
RES
RES
RES
RES
RES
RES
RES
N/A
No
No
Table 8.1 Register Summary (continued)
Reg
Addr
Read
/Write
Reg Name
Bit 7
MSb
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LSb
Default
Value
Lock
Start


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