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EMC2300 Datasheet(PDF) 43 Page - SMSC Corporation

Part No. EMC2300
Description  Fan Control Device with High Frequency PWM and Temperature Monitors
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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EMC2300 Datasheet(HTML) 43 Page - SMSC Corporation

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Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
SMSC EMC2300
43
Revision 0.2 (06-14-06)
DATASHEET
Note 7.9
100% duty cycle is 255/256.
Note 7.10 RPM=60/TRevolution, TTachPulse= TRevolution/2. Using 3 edges for detection, TTachPulse =
(PWM ”ON” Time – Guard Time). Minimum RPM values shown use minimum guard time
(88.88usec).
Note 7.11 100% duty cycle is 255/256
Note 7.12 RPM=60/TRevolution, TTachPulse= TRevolution/2. Using 2 edges for detection, TTachPulse =
2*(PWM ”ON” Time-Guard Time). Minimum RPM values shown use minimum guard time
(88.88usec).
7.1.4.9
Detection of a Stalled Fan
There is a fan failure bit (TACHx) in the interrupt status register used to indicate that a slow or stalled
fan event has occurred. If the tach reading value exceeds the value programmed in the tach limit
register the interrupt status bit is set. See Interrupt Status register 2 at offset 42h.
Notes:
The reading register will be forced to FFFFh if a stalled event occurs (i.e., stalled event =no edges
detected.)
The reading register will be forced to either FFFFh or FFFEh if a slow fan event occurs. (i.e., slow
event: 0 < #edges < programmed #edges). If the control bit, SLOW, located in the TACHx Options
registers at offsets 90h - 93h, is set then FFFEh will be forced into the corresponding Tach Reading
Register to indicate that the fan is spinning slowly.
The fan tachometer reading register stays at FFFFh in the event of a stalled fan. If the fan begins
to spin again, the tachometer logic will reset and latch the next valid reading into the tachometer
reading register.
7.1.4.10
Fan Interrupt Status Bits
The status bits for the fan events are in Interrupt Status Register 2 (42h). These bits are set when the
reading register is above the tachometer minimum and the Interrupt Enable 2 (Fan Tachs) register bits
are configured to enable Fan Tach events. No interrupt status bits are set for fan events (even if the
fan is stalled) if the associated tachometer minimum is set to FFFFh (registers 54h-5Bh).
Table 7.3 Minimum RPM Detectable Using 2 Edges
PWM
FREQUENCY
PULSE WIDTH AT DUTY CYCLE
(PWM ”ON” TIME)
MINIMUM RPM AT DUTY CYCLE (Note 7.12)
(30/TTachPulse)
(HZ)
25%
(MSEC)
50%
(MSEC)
100%
(MSEC)
(Note 7.11)
25%
50%
100%
87.7
2.85
5.7
11.36
5433
2673
1331
58.6
4.27
8.53
17
3588
1777
887
44
5.68
11.36
22.64
2683
1331
665
35.2
7.1
14.2
28.3
2139
1063
532
29.3
8.53
17.06
34
1777
884
442
21.9
11.42
22.83
45.48
1324
660
330
14.6
17.12
34.25
68.23
881
439
220
11
22.73
45.45
90.55
663
331
166


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