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AD9949 Datasheet(PDF) 3 Page - Analog Devices

Part No. AD9949
Description  12-Bit CCD Signal Processor with Precision Timing Core
Download  36 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD9949 Datasheet(HTML) 3 Page - Analog Devices

 
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AD9949
Rev. B | Page 3 of 36
SPECIFICATIONS
GENERAL SPECIFICATIONS
Table 1.
Parameter
Min
Typ
Max
Unit
TEMPERATURE RANGE
Operating
−20
+85
°C
Storage
−65
+150
°C
MAXIMUM CLOCK RATE
36
MHz
POWER SUPPLY VOLTAGE
AVDD, TCVDD (AFE, Timing Core)
2.7
3.0
3.6
V
HVDD (H1 to H4 Drivers)
2.7
3.0
3.6
V
RGVDD (RG Driver)
2.7
3.0
3.6
V
DRVDD (D0 to D11 Drivers)
2.7
3.0
3.6
V
DVDD (All Other Digital)
2.7
3.0
3.6
V
POWER DISSIPATION
36 MHz, HVDD = RGVDD = 3 V, 100 pF H1 to H4 Loading1
320
mW
Total Shutdown Mode
1
mW
1 The total power dissipated by the HVDD supply may be approximated using the equation
Total HVDD Power = (CLOAD x HVDD x Pixel Frequency) x HVDD x (Number of H – Outputs Used)
Reducing the H-loading, using only two of the outputs, and/or using a lower HVDD supply, reduces the power dissipation.
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = DRVDD = HVDD = RGVDD = 2.7 V, CL = 20 pF, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
LOGIC INPUTS
High Level Input Voltage
VIH
2.1
V
Low Level Input Voltage
VIL
0.6
V
High Level Input Current
IIH
10
µA
Low Level Input Current
IIL
10
µA
Input Capacitance
CIN
10
pF
LOGIC OUTPUTS
High Level Output Voltage, IOH = 2 mA
VOH
2.2
V
Low Level Output Voltage, IOL = 2 mA
VOL
0.5
V
CLI INPUT
High Level Input Voltage
(TCVDD/2 + 0.5 V)
VIH–CLI
1.85
V
Low Level Input Voltage
VIL–CLI
0.85
V
RG AND H-DRIVER OUTPUTS
High Level Output Voltage
(RGVDD – 0.5 V and HVDD – 0.5 V)
VOH
2.2
V
Low Level Output Voltage
VOL
0.5
V
Maximum Output Current (Programmable)
30
mA
Maximum Load Capacitance
100
pF


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