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AM41PDS3228D Datasheet(PDF) 28 Page - Advanced Micro Devices |
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AM41PDS3228D Datasheet(HTML) 28 Page - Advanced Micro Devices |
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28 / 59 page  May 13, 2002 Am41PDS3228D 27 P R E L IMINARY Table 10. Am29PDS322D Command Definitions Legend: X = Don’t care RA = Address of the memory location to be read. RD = Data read from location RA during read operation. PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later. PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first. SGA = Address of the sector group to be verified (in autoselect mode) or erased. Address bits A20–A12 uniquely select any sector. Notes: 1. See Table 1 for description of bus operations. 2. All values are in hexadecimal. 3. Except for the read cycle and the fourth and fifth cycle of the autoselect command sequence, all bus cycles are write cycles. 4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD and PD. 5. Unless otherwise noted, address bits A20–A12 are don’t cares in unlock sequence. 6. No unlock or command cycles required when device is in read mode. 7. The Reset command is required to return to the read mode (or to the erase-suspend-read mode if previously in Erase Suspend) when the device is in the autoselect mode, or if DQ5 goes high (while the device is providing status information). 8. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address to obtain the manufacturer ID, device ID, or SecSi Sector factory protect information. Data bits DQ15–DQ8 are don’t care. See the Autoselect Command Sequence section for more information. 9. The device ID must be read across the fourth, fifth and sixth cycles. The sixth cycle specifies 2201h for top boot or 2200h for bottom boot. 10. The data is 80h for factory locked and 00h for not factory locked. 11. The data is 00h for an unprotected sector group and 01h for a protected sector group. 12. The Unlock Bypass command is required prior to the Unlock Bypass Program command. 13. The Unlock Bypass Reset command is required to return to the read mode when the device is in the unlock bypass mode. 14. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only during a sector erase 15. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address. Command Sequence (Note 1) Bus Cycles (Notes 2–5) First Second Third Fourth Fifth Sixth Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Read (Note 6) 1 RA RD Reset (Note 7) 1 XXX F0 Manufacturer ID 4 555 AA 2AA 55 555 90 X00 0001 Device ID (Note 9) 4 555 AA 2AA 55 555 90 X01 227E X0E 2206 X0F 2201/ 2200 SecSi Sector Factory Protect (Note 10) 4 555 AA 2AA 55 555 90 X03 80/00 Sector Group Protect Verify (Note 11) 4 555 AA 2AA 55 555 90 (SGA) X02 XX00/ XX01 Enter SecSi Sector Region 3 555 AA 2AA 55 555 88 Exit SecSi Sector Region 4 555 AA 2AA 55 555 90 XXX 00 Program 4 555 AA 2AA 55 555 A0 PA PD Unlock Bypass 3 555 AA 2AA 55 555 20 Unlock Bypass Program (Note 12) 2 XXX A0 PA PD Unlock Bypass Reset (Note 13) 2 XXX 90 XXX 00 Chip Erase 6 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10 Sector Erase 6 555 AA 2AA 55 555 80 555 AA 2AA 55 SA 30 Erase Suspend (Note 14) 1 BA B0 Erase Resume (Note 15) 1 BA 30 |
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