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AM42DL32X4G Datasheet(PDF) 53 Page - Advanced Micro Devices |
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AM42DL32X4G Datasheet(HTML) 53 Page - Advanced Micro Devices |
53 / 64 page May 19, 2003 Am42DL32x4G 53 PR ELI M I NARY AC CHARACTERISTICS Alternate CE#f Controlled Erase and Program Operations Notes: 1. Not 100% tested. 2. See the “Flash Erase And Programming Performance” section for more information. Parameter Speed Options Unit JEDEC Std Description 70, 71 85 tAVAV tWC Write Cycle Time (Note 1) Min 70 85 ns t AVWL t AS Address Setup Time (WE# to Address) Min 0 ns t ASO Address Setup Time to CE#f Low During Toggle Bit Polling Min 15 ns t ELAX t AH Address Hold Time Min 45 ns t AHT Address Hold time from CE#f or OE# High During Toggle Bit Polling Min 0 ns t DVEH t DS Data Setup Time Min 35 45 ns t EHDX t DH Data Hold Time Min 0 ns t GHEL t GHEL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns t WLEL t WS WE# Setup Time Min 0 ns t EHWH t WH WE# Hold Time Min 0 ns t ELEH t CP CE#f Pulse Width Min 30 35 ns t EHEL t CPH CE#f Pulse Width High Min 30 ns t WHWH1 t WHWH1 Programming Operation (Note 2) Byte Typ 5 µs Word Typ 7 t WHWH1 t WHWH1 Accelerated Programming Operation, Word or Byte (Note 2) Typ 4 µs tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 0.4 sec |
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