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AM29F400B Datasheet(PDF) 5 Page - Advanced Micro Devices

Part No. AM29F400B
Description  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory
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Maker  AMD [Advanced Micro Devices]
Homepage  http://www.amd.com
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AM29F400B Datasheet(HTML) 5 Page - Advanced Micro Devices

 
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November 1, 2006 21505E5
Am29F400B
3
D A TA
SH EE T
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8
Table 1. Am29F400B Device Bus Operations .................................. 8
Word/Byte Configuration .......................................................... 8
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 8
Program and Erase Operation Status ...................................... 9
Standby Mode .......................................................................... 9
RESET#: Hardware Reset Pin ................................................. 9
Output Disable Mode ................................................................ 9
Table 2. Am29F400BT Top Boot Block Sector Address Table ....... 10
Table 3. Am29F400BB Bottom Boot Block Sector Address Table.. 10
Autoselect Mode ..................................................................... 10
Table 4. Am29F400B Autoselect Codes (High Voltage Method) .... 11
Sector Protection/Unprotection ............................................... 11
Temporary Sector Unprotect .................................................. 11
Figure 1. Temporary Sector Unprotect Operation........................... 11
Hardware Data Protection ...................................................... 12
Low VCC Write Inhibit...................................................................... 12
Write Pulse “Glitch” Protection ........................................................ 12
Logical Inhibit .................................................................................. 12
Power-Up Write Inhibit .................................................................... 12
Command Definitions . . . . . . . . . . . . . . . . . . . . . 13
Reading Array Data ................................................................ 13
Reset Command ..................................................................... 13
Autoselect Command Sequence ............................................ 13
Word/Byte Program Command Sequence ............................. 13
Figure 2. Program Operation .......................................................... 14
Chip Erase Command Sequence ........................................... 14
Sector Erase Command Sequence ........................................ 14
Erase Suspend/Erase Resume Commands ........................... 16
Figure 3. Erase Operation............................................................... 16
Table 5. Am29F400B Command Definitions................................... 17
Write Operation Status . . . . . . . . . . . . . . . . . . . . 18
DQ7: Data# Polling ................................................................. 18
Figure 4. Data# Polling Algorithm ................................................... 18
RY/BY#: Ready/Busy# ........................................................... 19
DQ6: Toggle Bit I .................................................................... 19
DQ2: Toggle Bit II ................................................................... 19
Reading Toggle Bits DQ6/DQ2 .............................................. 19
DQ5: Exceeded Timing Limits ................................................ 20
DQ3: Sector Erase Timer ....................................................... 20
Figure 5. Toggle Bit Algorithm......................................................... 20
Table 6. Write Operation Status...................................................... 21
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 22
Figure 6. Maximum Negative Overshoot Waveform ....................... 22
Figure 7. Maximum Positive Overshoot Waveform........................ 22
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 22
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23
TTL/NMOS Compatible .......................................................... 23
CMOS Compatible .................................................................. 24
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8. Test Setup....................................................................... 25
Table 7. Test Specifications ........................................................... 25
Key to Switching Waveforms. . . . . . . . . . . . . . . . 25
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Read Operations .................................................................... 26
Figure 9. Read Operations Timings ............................................... 26
Hardware Reset (RESET#) .................................................... 27
Figure 10. RESET# Timings .......................................................... 27
Word/Byte Configuration (BYTE#)
...................................... 28
Figure 11. BYTE# Timings for Read Operations............................ 28
Figure 12. BYTE# Timings for Write Operations............................ 28
Erase/Program Operations ..................................................... 29
Figure 13. Program Operation Timings.......................................... 30
Figure 14. Chip/Sector Erase Operation Timings .......................... 31
Figure 15. Data# Polling Timings (During Embedded Algorithms). 32
Figure 16. Toggle Bit Timings (During Embedded Algorithms)...... 32
Figure 17. DQ2 vs. DQ6................................................................. 33
Temporary Sector Unprotect .................................................. 33
Figure 18. Temporary Sector Unprotect Timing Diagram .............. 33
Alternate CE# Controlled Erase/Program Operations ............ 34
Figure 19. Alternate CE# Controlled Write Operation Timings ...... 35
Erase and Programming Performance . . . . . . . . 36
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 36
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 36
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 37
TS 048—48-Pin Standard Thin Small Outline Package ......... 37
SO 044—44-Pin Small Outline Package ................................ 38
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 39
Revision A (August 1997) ....................................................... 39
Revision B (October 1997) ..................................................... 39
Revision C (January 1998) ..................................................... 39
Revision C+1 (February 1998) ............................................... 39
Revision C+2 (April 1998) ....................................................... 39
Revision C+3 (June 1998) ...................................................... 39
Revision C+4 (August 1998) ................................................... 40
Revision D (January 1999) ..................................................... 40
Revision D+1 (July 2, 1999) ................................................... 40
Revision E (November 15, 1999) ............................................ 40
Revision E+1 (November 30, 2000) ....................................... 40
Revision E+2 (June 4, 2004) .................................................. 40
Revision E+3 (December 22, 2005) ....................................... 40
Revision E4 (May 18, 2006) ................................................... 40


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