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AM29LV800B Datasheet(PDF) 3 Page - Advanced Micro Devices

Part No. AM29LV800B
Description  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
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Maker  AMD [Advanced Micro Devices]
Homepage  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29LV800B Datasheet(HTML) 3 Page - Advanced Micro Devices

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1
6/1/05
PR EL IMI N A R Y
(DR A F T )
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Special Handling Instructions for FBGA Package .. 9
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Standard Products ................................................ 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29LV800B Device Bus Operations ..........11
Word/Byte Configuration ...................................... 11
Requirements for Reading Array Data ................. 11
Writing Commands/Command Sequences .......... 11
Program and Erase Operation Status .................. 12
Standby Mode ...................................................... 12
Automatic Sleep Mode ......................................... 12
RESET#: Hardware Reset Pin ............................. 12
Output Disable Mode ............................................ 12
Table 2. Am29LV800BT Top Boot Block
Sector Addresses ........................................................13
Table 3. Am29LV800BB Bottom Boot Block
Sector Addresses ........................................................13
Autoselect Mode ................................................... 14
Table 4. Am29LV800B Autoselect Codes
(High Voltage Method) ................................................14
Sector Protection/Unprotection ............................ 14
Temporary Sector Unprotect ................................ 14
Figure 1. Temporary Sector Unprotect Operation....... 15
Figure 2. In-System Sector Protect/
Sector Unprotect Algorithms ....................................... 16
Hardware Data Protection .................................... 17
Command Definitions . . . . . . . . . . . . . . . . . . . . . 17
Reading Array Data .............................................. 17
Reset Command .................................................. 17
Autoselect Command Sequence .......................... 17
Word/Byte Program Command Sequence ........... 18
Figure 3. Program Operation ...................................... 18
Chip Erase Command Sequence ......................... 19
Sector Erase Command Sequence ...................... 19
Erase Suspend/Erase Resume Commands ......... 19
Figure 4. Erase Operation........................................... 20
Table 1. Am29LV800B Command Definitions .............21
Write Operation Status . . . . . . . . . . . . . . . . . . . . 22
DQ7: Data# Polling ............................................... 22
Figure 5. Data# Polling Algorithm ............................... 22
RY/BY#: Ready/Busy# ......................................... 22
DQ6: Toggle Bit I .................................................. 23
DQ2: Toggle Bit II ................................................. 23
Reading Toggle Bits DQ6/DQ2 ............................ 23
DQ5: Exceeded Timing Limits .............................. 23
Figure 6. Toggle Bit Algorithm..................................... 24
DQ3: Sector Erase Timer ..................................... 24
Table 2. Write Operation Status ..................................25
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 26
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 26
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
CMOS Compatible ............................................... 27
Figure 9. ICC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) .......................................... 28
Figure 10. Typical ICC1 vs. Frequency ........................ 28
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11. Test Setup.................................................. 29
Table 3. Test Specifications ........................................29
Key to Switching Waveforms. . . . . . . . . . . . . . . . 29
Figure 12. Input Waveforms and
Measurement Levels ................................................... 29
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 30
Read Operations .................................................. 30
Figure 13. Read Operations Timings .......................... 30
Hardware Reset (RESET#) .................................. 31
Figure 14. RESET# Timings........................................ 31
Word/Byte Configuration (BYTE#)
..................... 32
Figure 15. BYTE# Timings for Read Operations......... 32
Figure 16. BYTE# Timings for Write Operations ......... 32
Erase/Program Operations ................................... 33
Figure 17. Program Operation Timings ....................... 34
Figure 18. Chip/Sector Erase Operation Timings........ 35
Figure 19. Data# Polling Timings (During
Embedded Algorithms)................................................ 36
Figure 20. Toggle Bit Timings (During
Embedded Algorithms)................................................ 36
Figure 21. DQ2 vs. DQ6.............................................. 37
Temporary Sector Unprotect ................................ 37
Figure 22. Temporary Sector Unprotect
Timing Diagram ........................................................... 37
Figure 23. Sector Protect/Unprotect
Timing Diagram ........................................................... 38
Alternate CE# Controlled Erase/Program Operations
39
Figure 24. Alternate CE# Controlled Write
Operation Timings ....................................................... 40
Erase and Programming Performance . . . . . . . 41
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 41
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 41
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 42
TS 048—48-Pin Standard TSOP ........................ 42
TSR048—48-Pin Reverse TSOP ........................ 43
FBB 048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 9 mm ................................................ 44
SO 044—44-Pin Small Outline Package ............. 45
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 46


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