EtronTech

EM564161

Etron Technology, Inc.

No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.

TEL: (886)-3-5782345

FAX: (886)-3-5778671

Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.

256K x 16 Low Power SRAM

Rev 3.1

04/2004

Features

• Single power supply voltage of 2.3V to 3.6V

• Power down features using CE1# and CE2

• Low power dissipation

• Data retention supply voltage: 1.0V to 3.6V

• Direct TTL compatibility for all input and output

• Wide operating temperature range: -40°C to 85°C

• Standby current @ VDD = 3.6 V

IDDS2

Typical

Maximum

EM564161BC -55

1

µA

10

µA

EM564161BC/BA -70/85

1

µA

10

µA

EM564161BC –55E

5

µA

80

µA

EM564161BC/BA -70E/85E

5

µA

80

µA

Ordering Information

Part Number

Speed

Package

EM564161BC-55

55 ns

10

µA

6x8 BGA

EM564161BC-55E

55 ns

80

µA

6x8 BGA

EM564161BC-70

70 ns

10

µA

6x8 BGA

EM564161BC-70E

70 ns

80

µA

6x8 BGA

EM564161BA-70

70 ns

10

µA

8x10 BGA

EM564161BA-70E

70 ns

80

µA

8x10 BGA

EM564161BC-85

85 ns

10

µA

6x8 BGA

EM564161BA-85

85 ns

10

µA

8x10 BGA

EM564161BA-85E

85 ns

80

µA

8x10 BGA

Overview

Pin Configuration

48-Ball BGA (CSP), Top View

1

2

3

4

5

6

A

B

C

D

E

F

G

H

LB#

OE#

A0A1A2

CE2

NC

A8

A9

A10

A11

NC

DQ15

NC

A12

A13

WE#

DQ7

DQ14

DQ13

A14

A15

DQ5

DQ6

VDD

DQ12

NC

A16

DQ4

GND

DQ8

UB#

A3

A4

CE 1#

DQ0

DQ9

DQ10

A5

A6

DQ1

DQ2

GND

DQ11

A17

A7

DQ3

VDD

Pin Description

Symbol

Function

A0 - A17

Address Inputs

DQ0 - DQ15

Data Inputs / Outputs

CE1#, CE2

Chip Enable Inputs

OE#

Output Enable

WE#

Read / Write Control Input

LB#, UB#

Data Byte Control Inputs

GND

Ground

Power Supply

NC

No Connection

The EM564161 is a 4,194,304-bit SRAM organized as 262,144 words by 16 bits. It is designed with advanced

CMOS technology.

This Device operates from a single 2.3V to 3.6V power supply. Advanced circuit

technology provides both high speed and low power. It is automatically placed in low-power mode when chip

enable (CE1#) is asserted high or (CE2) is asserted low. There are three control inputs. CE1# and CE2 are

used to select the device and for data retention control, and output enable (OE#) provides fast memory access.

Data byte control pin (LB#,UB#) provides lower and upper byte access. This device is well suited to various

microprocessor system applications where high speed, low power and battery backup are required. And, with a