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ICM7218DIJI Datasheet(PDF) 6 Page - Intersil Corporation

Part # ICM7218DIJI
Description  8-Digit LED Microprocessor-Compatible Multiplexed Display Decoder Driver
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ICM7218DIJI Datasheet(HTML) 6 Page - Intersil Corporation

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FN3159.2
February 15, 2007
Inter Digit Blanking
A blanking time of approximately 10
μs occurs between digit
strobes. This ensures that the segment information is correct
before the next digit drive, thereby avoiding display ghosting.
Driving Larger Displays
If a higher average drive current per digit is required, it is
possible to connect digit drive outputs together. For example,
by paralleling pairs of digit drivers together to drive a 4 digit
display, 5mA average segment drive current can be obtained.
Power Dissipation Considerations
Assuming common anode drive at VDD = 5V and all digits on
with an average of 5 segments driven per digit, the average
current would be approximately 200mA. Assuming a 1.8V
drop across the LED display, there will be a 3.2V drop across
the ICM7218. The device power dissipation will therefore be
640mW, rising to about 900mW, for all ‘8’ ‘s displayed.
Caution: Position device in system such that air can
flow freely to provide maximum cooling. The common
cathode dissipation is approximately one-half that of the
common anode dissipation.
Sequential Addressing Considerations
(lCM7218A/B)
The control instructions are read from the input bus lines if
MODE is high and WRITE low. The instructions occur on 4
lines and are - DECODE/no Decode, type of Decode (if
desired), SHUTDOWN/no Shutdown and DATA COMlNG/not
Coming. After the control word has been written (with the Data
Coming instruction), display data can be written into memory
with each successive negative going WRITE pulse. After all
8-digit memory locations have been written to, additional
transitions of the WRITE input are ignored until a new control
word is written. It is not possible to change one individual digit
without refreshing the data for all the other digits.
Random Access Input Drive Considerations
(ICM7218C/D)
Control instructions are provided to the ICM7218C/D by a
single three level input terminal (Pin 9), which operates
independently of the WRITE pulse.
Data can be written into memory on the lCM7218C/D by
setting up a 3 bit binary code (one of eight) on the digit
address inputs and applying a low level to the WRITE pin.
For example, it is possible to change only digit 7 without
altering the data for the other digits. (See Figure 6).
Supply Capacitor
A 0.1
μF plus a 47μF capacitor is recommended between
VDD and VSS to bypass display multiplexed noise.
FIGURE 4. TIMING DIAGRAM FOR ICM7218A/B
FIGURE 5. LOAD SEQUENCE ICM7218A/B
ICM7218


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