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ISP1103D Datasheet(PDF) 8 Page - NXP Semiconductors |
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ISP1103D Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 17 page Philips Semiconductors ISP1103 USB transceiver Preliminary specification Rev. 01 — 4 October 1999 8 of 17 9397 750 06329 © Philips Electronics N.V. 1999. All rights reserved. [1] Test circuit: see Figure 11. [2] Excluding the first transition from Idle state. [3] Characterized only, not tested. Limits guaranteed by design. Driver timing tPLH propagation delay (VPO/VO, VMO/FSE0 to D +,D−) LOW-to-HIGH; see Figure 8 - - 165 ns tPHL HIGH-to-LOW; see Figure 8 - - 145 ns tPHZ 3-state output disable time (OE to D +,D−) HIGH-to-OFF; see Figure 6 --6 ns tPLZ LOW-to-OFF; see Figure 6 --5 ns tPZH 3-state output enable time (OE to D +,D−) OFF-to-HIGH; see Figure 6 - - 100 ns tPZL OFF-to-LOW; see Figure 6 - - 100 ns Receiver timing Differential receiver tPLH propagation delay (D +,D− to RCV) LOW-to-HIGH; see Figure 7 --9 ns tPHL HIGH-to-LOW; see Figure 7 --10 ns Single-ended receiver tPLH propagation delay (D +,D− to VP,VM) LOW-to-HIGH; see Figure 7 --5 ns tPHL HIGH-to-LOW; see Figure 7 --8 ns Table 12: Dynamic characteristics: analog I/O pins (D +, D−); low-speed mode [1]…continued VCC =VCC(3.3); VGND =0V; Tamb = −40 to +85 °C; CL = 50 pF; RPU = 1.5 kΩ on D− to VTERM.; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Fig 5. Rise and fall times. Fig 6. Timing of OE to D+, D-. Fig 7. Timing of D+, D- to RCV, VP, VM. Fig 8. Timing of VPO/VO, VMO/FSE0 to D+, D-. MGS255 tFR, tLR tFF, tLF VOH VOL 90% 90% 10% 10% MGS257 tPZH tPZL +3.0 to +5.5 V 0 V logic input +3.3 V 0 V differential data lines tPHZ tPLZ 1/2VCC(3.3) VOH − 0.3 V VOL + 0.3 V VCRS MGS256 tPLH +3.3 V 0 V differential data lines tPHL VOH 0 V logic output 1/2VCC(3.3) VCRS MGS254 tPLH +3.0 to +5.5 V 0 V logic input +3.3 V 0 V differential data lines tPHL 1/2VCC(3.3) VCRS |
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