LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports

SMSC SCH311X

5

Revision 1.0 (11-13-06)

PRODUCT PREVIEW

Block Diagram

Figure 1 SCH311X Block Diagram

LEDs

Internal Bus

(Data, Address, and Control lines)

Power Mgmt

CLOCK

GEN

CLKI32

CLOCKI

WDT

32 byte

Security

Key

Register

Power Control

and Recovery

PB_IN#

PS_ON#

SLP_SX#

PB_OUT#

Hardware

Monitor

General

Purpose

I/O

WDT*

SER_IRQ

PCICLK

LPC

Bus Interface

SERIAL

IRQ

SMSC

Proprietary

82077

Compatible

Floppydisk

Controller with

Digital Data

Separator &

Write Precom-

pensation

High-Speed

16550A

UART

PORT 1 & 2

Multi-Mode

Parallel Port

with

AND FDC MUX

Keyboard/Mouse

8042

controller

PCI Reset

Outputs

High-Speed

16550A

UART

PORT 3& 4

High-Speed

16550A

UART

PORT 5 & 6

TXD1, RXD1

nCTS1, nRTS1

nDSR1, nDTR1

nDCD1, nRI1

TXD2 (IRTX2)

RXD2 (IRRX2)

nCTS2, nRTS2

nDSR2, nDTR2

nDCD2, nRI2

PD[7:0]

BUSY,nSCLTIN

SCLT, PE

nERROR, nACK

nSTROBE, nINIT, nALF

TXD3, RXD3

nCTS3, nRTS3

nDSR3, nDTR3

nDCD3, nRI3

TXD4, RXD4,

nCTS4, nRTS4

nDSR4, nDTR4

nDCD4, nRI4

nIDE_RSTDRV

nPCIRST[1:3]

MCLK, MDAT

A20M,

nKBDRST,

KCLK,KDAT

TXD5, RXD5

nSCIN5

nSCOUT5

TXD6, RXD6

nSCIN6

nSCOUT6

LAD[3:0]

LFRAME#

LDRQ#

PCI_RESET#

nIO_PME

nIO_SMI

nMTR0,

nTRK0,

nINDEX

nWGATE,

nHDSEL,

DRVDEN0*,

nWRTPRT,

nDIR, nSTEP,

nDSKCHG,

nDS0,

nRDATA,

nWDATA

GP10-17

GP21,22,

GP27,

GP30-34,

GP36-37,

GP40, GP42,

GP44-47,

GP50-57,

GP60-67

SCH3116 ONLY

SCH3114,

SCH3116 ONLY

SCH3112,

SCH3114 ONLY

nFPRST

PWRGD_PS

PWRGD_OUT

Reset

Generation

Watchdog

Timer

nThremtrip