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SI3016 Datasheet(PDF) 39 Page - Silicon Laboratories |
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SI3016 Datasheet(HTML) 39 Page - Silicon Laboratories |
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39 / 50 page  Si3016 Rev. 1.0 39 3FLVM Force Low Voltage DC Termination Mode. 0 = Normal gain. 1 = When the DCT[1:0] bits are set to 10b (FCC mode), setting this bit will force the Low Voltage dc termination mode while allowing for a transmit level of –1 dBm. See "4.13. DTMF Dialing" on page 19. 2MODE MODE Control. This bit is used to enable the on-hook line monitor ADC and the line voltage monitor. MODE OH ONHM Line Function SDO LVCS[4:0] 0 0 0 on-hook ring data 0 0 0 1 on-hook line data using 11111 if a line the higher voltage current line exists, or monitor 00000 if no line voltage exists 0 1 0 off-hook line data loop current 0 1 1 off-hook/Fast DCT mode line data loop current 1 0 0 on-hook ring data line voltage 1 0 1 on-hook line data using line voltage the low current line monitor 1 1 0 force on-hook no data is line voltage transmitted on SDO in this mode 1 1 1 force on-hook line data using line voltage the low current line monitor Notes: 1. If RZ = 1, LVCS[4:0] = either 11111 or 00000 during a ring event. All ones are shown if a line voltage exists; all zeroes are shown if no line voltage exists. 2. Force on-hook mode puts the Si3016 into an on-hook state without restarting the off-hook counter. This is used to support Type II caller ID. 3. The MODE bit is in a different register than the OH and ONHM bits. The user should write the registers in a sequence so as not to pass through an undesired state. 4. Fast DCT mode puts the Si3016 into an off-hook state that is intended to quickly settle the line voltage just after going off-hook. While in this mode, data transmission is not recommended. This is used to support Type II caller ID. 5. The ONHM bit should be cleared before setting the OH bit. If both bits need to be set, the OH bit should be set first, and then the ONHM bit should be set in a separate register access. 1RFWE Ring Detector Full Wave Rectifier Enable. When set, the ring detection circuitry provides full-wave rectification. This will affect the RGDT pin as well as the data stream presented on SDO during ring detection. 0 = Half Wave. 1 = Full Wave. 0SQLH Ring Detect Network Squelch. This bit must be set, then cleared after at least 1 ms, following a polarity reversal or ring signal detection. It is used to quickly recover the offset on the RNG1/2 pins after a polarity reversal or ring signal. If the SQL2 bit is enabled during CID data reception, this bit should not be used. 0 = Normal operation. 1 = Squelch function is enabled. Bit Name Function |
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