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Device Address

0

1

0

0

A1

A2

A0

Slave Address

R/W

Fixed

Programmable

Control Register and Command Byte

0

0

0

B2

B1

B0

0

0

PCA9555

WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

SCPS131D – AUGUST 2005 – REVISED OCTOBER 2006

Figure 4 shows the address byte of the PCA9555.

Figure 4. PCA9555 Address

Address Reference

INPUTS

A2

A1

A0

L

L

L

32 (decimal), 20 (hexadecimal)

L

L

H

33 (decimal), 21 (hexadecimal)

L

H

L

34 (decimal), 22 (hexadecimal)

L

H

H

35 (decimal), 23 (hexadecimal)

H

L

L

36 (decimal), 24 (hexadecimal)

H

L

H

37 (decimal), 25 (hexadecimal)

H

H

L

38 (decimal), 26 (hexadecimal)

H

H

H

39 (decimal), 27 (hexadecimal)

The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read

operation, while a low (0) selects a write operation.

Following the successful acknowledgment of the address byte, the bus master sends a command byte that is

stored in the control register in the PCA9555. Three bits of this data byte state the operation (read or write) and

the internal register (input, output, polarity inversion or configuration) that will be affected. This register can be

Once a command byte has been sent, the register that was addressed continues to be accessed by reads until

a new command byte has been sent.

Figure 5. Control Register Bits

Command Byte

CONTROL REGISTER BITS

COMMAND

POWER-UP

REGISTER

PROTOCOL

BYTE (HEX)

DEFAULT

B2

B1

B0

0

0

0

0x00

Input Port 0

Read byte

xxxx xxxx

0

0

1

0x01

Input Port 1

Read byte

xxxx xxxx

0

1

0

0x02

Output Port 0

Read/write byte

1111 1111

0

1

1

0x03

Output Port 1

Read/write byte

1111 1111

1

0

0

0x04

Polarity Inversion Port 0

Read/write byte

0000 0000

1

0

1

0x05

Polarity Inversion Port 1

Read/write byte

0000 0000

1

1

0

0x06

Configuration Port 0

Read/write byte

1111 1111

1

1

1

0x07

Configuration Port 1

Read/write byte

1111 1111

8

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