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CA3304AD Datasheet(PDF) 3 Page - Intersil Corporation |
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CA3304AD Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 12 page 3 Allowable Input Bandwidth (Note 4) - 25 fCLK/2 MHz -3dB Input Bandwidth -40- MHz REFERENCE INPUTS Input Range VREF+ Range (Note 4) VAA- +0.5 -VAA+V VREF- Range (Note 4) VAA-- VAA+ - 0.5 V Input Loading Resistor Ladder Impedance VIN = 5V, CLK = Low 640 - 960 Ω DIGITAL INPUTS Digital Input Maximum VIN, Low CLOCK (Notes 3, 4) - - 0.3 x VAA V CE1, CE2 (Note 4) - - 0.3 x VDD V Minimum VIN, High CLOCK (Notes 3, 4) 0.7 x VAA -- V CE1, CE2 (Note 4) 0.7 x VDD -- V Input Leakage, Except CLK V = 0V, 5V - - ±1 µA Input Leakage, CLK (Note 3) - ±100 ±150 µA DIGITAL OUTPUTS Digital Outputs Output Low (Sink) Current VO = 0.4V 6 - - mA Output High (Source) Current VO = 4.6V -3 - - mA Three-State Leakage Current VO = 0V, 5V - ±0.2 ±5 µA TIMING CHARACTERISTICS Conversion Timing Maximum Conversion Speed CLK = Square Wave 25 35 - MSPS Auto-Balance Time ( φ1) 20 - - ns Sample Time ( φ2) 20 - 5000 ns Output Timing Data Valid Delay (Note 4) - 30 40 ns Data Hold Time (Note 4) 15 25 - ns Output Enable Time - 15 - ns Output Disable Time - 10 - ns POWER SUPPLY CHARACTERISTICS Device Current, IAA Continuous Clock - 5.5 - mA Continuous φ2- 0.4 - mA Continuous φ1- 2 - mA Device Current, IDD Continuous Clock - 1.5 - mA VAA+ = 5V, VSS = CE1 = VAA- = CLK = GND Continuous φ2- 5 10 mA VAA+ = 7V Continuous φ1- 5 20 mA NOTES: 1. Full scale input range, VREF+ - VREF-, may be in the range of 0.5V to VAA+ -VAA- volts. Linearity errors increase at lower full scale ranges, however. 2. Input current is due to energy transferred to the input at the start of the sample period. The average value is dependent on input and VDD voltage. 3. The CLK input is a CMOS inverter with a 50k Ω feedback resistor. It operates from the VAA+ and VAA- supplies. It may be AC-coupled with a 1VP-P minimum source. 4. Parameter not tested, but guaranteed by design or characterization. Electrical Specifications TA = 25 oC, V REF+ = 2V, VDD = VAA+ = 5V, VAA- = VREF - = VSS = GND, fCLK = 25MHz Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS CA3304, CA3304A |
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