Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

SN74AUC1G125 Datasheet(PDF) 5 Page - Texas Instruments

Part No. SN74AUC1G125
Description  SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
Download  12 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo 

SN74AUC1G125 Datasheet(HTML) 5 Page - Texas Instruments

 
Zoom Inzoom in Zoom Outzoom out
 5 / 12 page
background image
www.ti.com
PARAMETER MEASUREMENT INFORMATION
NOTES: A. C includesprobeandjigcapacitance.
B. Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol.
Waveform2isforanoutputwithinternalconditionssuchthattheoutputishigh,exceptwhendisabledbytheoutputcontrol.
C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR
10MHz,Z =50
,
slewrate
1V/ns.
D. Theoutputsaremeasuredoneatatime,withonetransitionpermeasurement.
E. t
andt
arethesameast .
F. t
andt
arethesameast .
G. t
andt
arethesameast .
L
O
PLZ
PHZ
dis
PZL
PZH
en
PLH
PHL
pd
£
W
³
FromOutput
UnderTest
C
(seeNote A)
L
LOADCIRCUIT
S1
2×V
CC
Open
GND
R
L
R
L
t
/t
PLH
PHL
Open
TEST
S1
2×V
CC
t
/t
PLZ
PZL
GND
t
/t
PHZ
PZH
0V
t
W
Input
0V
Input
Output
Output
VOLTAGEWAVEFORMS
PROPAGATIONDELAY TIMES
INVERTING ANDNONINVERTINGOUTPUTS
VOLTAGEWAVEFORMS
PULSEDURATION
V
CC/2
V
CC/2
V
CC/2
V
CC/2
V
OL
V
OH
V
CC
V
CC
V
OH
V
OL
V
CC/2
V
CC/2
V
CC/2
V
CC/2
t
PLH
t
PHL
t
PLH
t
PHL
t
h
t
su
DataInput
TimingInput
0V
0V
Output
Waveform1
S1at2×V
(seeNoteB)
CC
Output
Waveform2
S1atGND
(seeNoteB)
V
OL
V
OH
0V
»0V
Output
Control
V
CC/2
V
CC/2
V
CC/2
V
CC/2
V
CC/2
VOLTAGEWAVEFORMS
ENABLE ANDDISABLETIMES
LOW- ANDHIGH-LEVEL ENABLING
VOLTAGEWAVEFORMS
SETUP ANDHOLDTIMES
V
CC
V
CC
V
CC
V
CC/2
V
CC/2
V
CC
t
PZL
t
PLZ
t
PHZ
t
PZH
V
– V
OH
D
V
+V
OL
D
0.8V
1.2V
0.1V
±
1.5V
0.1V
±
1.8V
0.15V
±
2.5V
0.2V
±
1.8V
0.15V
±
2.5V
0.2V
±
V
CC
2kW
2kW
2kW
2kW
2kW
1kW
500 W
R
L
0.1V
0.1V
0.1V
0.15V
0.15V
0.15V
0.15V
V
D
C
L
15pF
15pF
15pF
15pF
15pF
30pF
30pF
SN74AUC1G125
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
SCES382K – MARCH 2002 – REVISED APRIL 2007
Figure 1. Load Circuit and Voltage Waveforms
5
Submit Documentation Feedback


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn