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CDP1855 Datasheet(PDF) 4 Page - Intersil Corporation

Part # CDP1855
Description  8-Bit Programmable Multiply/Divide Unit
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP1855 Datasheet(HTML) 4 Page - Intersil Corporation

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Functional Description
The CDP1855 is a multiply-divide unit (MDU) designed to be
compatible with CDP1800 series microprocessor systems. It
can, in fact, be interfaced to most 8-bit microprocessors (see
Figure 5). The CDP1855 performs binary multiply or divide
operations as directed by the microprocessor. It can do a
16N-bit by 8N-bit divide yielding a 8N-bit result plus and 8N-
bit remainder. The multiply is an 8N-bit by 8N-bit operation
with a 16N-bit result. The “N” represent the number of
cascaded CDP1855's and can be 1, 2, 3 or 4. All operations
require 8N + 1 shift pulses (See “DELAY NEEDED WITH
AND WITHOUT PRESCALER”).
The CDP1855 contains three registers, X, Y, and Z, which
are loaded with the operands prior to an operation and
contain the results at the completion. In addition, the control
register must be loaded to initiate a multiply or divide. There
is also a status register which contains an overflow flag as
shown in the “CONTROL REGISTER BIT ASSIGNMENT
TABLE”. The register address lines (RA0-RA1) are used to
select the appropriate register for loading or reading. The
RD/WE and STB lines are used in conjunction with the RA
lines
to
determine
the
exact
MDU
response
(See
“CONTROL TRUTH TABLE”).
When multiple MDU's are cascaded, the loading of each reg-
ister is done sequentially. For example, the first selection of
FIGURE 2. BLOCK DIAGRAM OF CDP1855 AND CDP1855C
22
BUS
7
21
BUS
6
20
BUS
5
19
BUS
4
18
BUS
3
17
BUS
2
16
BUS
1
15
BUS
0
11
REGISTER
SELECT LOGIC
12
13
1
SELECT CONTROL
SELECT Z
SELECT Y
SELECT X
SELECT STATUS
X SEQUENCE
COUNTER
RESET
OUT
8
CLOCK
26
CN1
27
CN0
8
ADD/
SUBTRACT
X REGISTER
LOAD
8
SHIFT
GENERATOR
Y REGISTER
LOAD
STATUS
REG
8
8
Y SEQUENCE
COUNTER
RESET
OUT
Z SEQUENCE
COUNTER
RESET
OUT
CHIP
NO.
SHIFT
RESET
Z REGISTER
LOAD
8
SHIFT
RESET
25
3
4
5
24
6
23
LOAD
10
7
2
9
RD/WE
SHIFT
CLEAR
STB
C.I.
CTL.
C.O./O.F.
YL
YR
ZL
ZR
RA2 RA1 RA0
CE
C.O.
14
28 VDD
VSS
CDP1855, CDP1855C


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