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HEF4025B Datasheet(PDF) 3 Page - NXP Semiconductors

Part No. HEF4025B
Description  Triple 3-input NOR gate
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

HEF4025B Datasheet(HTML) 3 Page - NXP Semiconductors

  HEF4025B Datasheet HTML 1Page - NXP Semiconductors HEF4025B Datasheet HTML 2Page - NXP Semiconductors HEF4025B Datasheet HTML 3Page - NXP Semiconductors  
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January 1995
3
Philips Semiconductors
Product specification
Triple 3-input NOR gate
HEF4025B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In → On
5
70
135
ns
43 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
25
55
ns
14 ns
+ (0,23 ns/pF) CL
15
20
40
ns
12 ns
+ (0,16 ns/pF) CL
5
60
120
ns
33 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
25
50
ns
14 ns
+ (0,23 ns/pF) CL
15
15
35
ns
7 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
VDD
V
TYPICAL FORMULA FOR P (
µW)
Dynamic power
5
900 fi +∑ (foCL) × VDD 2
where
dissipation per
10
4000 fi +∑ (foCL) × VDD 2
fi = input freq. (MHz)
package (P)
15
10 900 fi +∑ (foCL) × VDD 2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)


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