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FBL22031BB Datasheet(PDF) 6 Page - NXP Semiconductors |
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FBL22031BB Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 16 page  Philips Semiconductors Product specification FBL22031 9-bit BTL 3.3V latched/registered/pass-thru Futurebus+ transceiver with 30 Ω termination 2000 Apr 18 6 LOGIC DIAGRAM Decode Out In 46 45 OEB0 OEB1 47 OEA 14 A8 DQ Clk 24 B8 38 18 LCAB 20 SEL0 28 30 32 34 36 BTL TMS TCK TDI TDO 42 44 22 21 (JTAG Boundary Scan pins) LOGIC GND = 1, 3, 5, 7, 9, 11, 13, 51 BUS GND = 25, 27, 29, 31, 33, 35, 37, 39, 41 BIAS V = 48 VCC = 23, 43, 49 BG VCC =17 BG GND = 19 DQ E MUX A ⇒ B QD MUX A ⇒ B 26 B7 12 A7 MUX A ⇐ B 52 10 8 6 4 2 TTL A1 MUX A ⇒ B MUX A ⇐ B B1 40 50 MUX A ⇒ B MUX A ⇐ B B0 DQ Clk DQ E DQ Clk DQ E D Q Clk D Q E D Q Clk D Q E D Q E DQ E DQ Clk D Q Clk D Q E 15 SEL1 16 LCBA D Q Clk MUX A ⇐ B A0 SG00061 |
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