Micrel, Inc.

SY89218U

January 2007

5

M9999-012407-B

Pin Number

Pin Name

Pin Function

64

EN

Single-Ended Input: This TTL/CMOS input disables and enables the outputs. It is

internally connected to a 25k

Ω pull-up resistor and will default to logic HIGH state if left

open. When disabled, true outputs go LOW and complementary outputs switch to HIGH.

description, refer to Figures 2d and 2e.

19, 32, 49, 63

GND,

Exposed Pad

Ground and exposed pad must be connected to the same GND plane on the board.

Function Table

/MR

(1)

EN

(2, 3)

CLK_SEL

FSELx0

(4)

FSELx1

(4)

Q

1

1

0

0

0

IN0÷1

1

1

1

0

0

IN1÷1

1

1

0

1

0

IN0÷2

1

1

1

1

0

IN1÷2

1

1

0

X

1

IN0÷4

1

1

1

X

1

IN1÷4

1

0

X

X

X

0

0

X

X

X

X

0

Notes:

1.

/MR asynchronously forces Q to LOW (/Q to HIGH).

2.

EN forces Q LOW between 2 and 6 input clock cycles after the falling edge of EN. Refer to “Timing Diagram” section.

3.

EN synchronously enables Q between two and six input clock cycles after the rising edge of EN. Refer to “Timing Diagram” section.

4.

FSEL valid for each of the banks A, B, C, and D. Banks can be programmed independent of each other.