1

SY58035U

Micrel, Inc.

M9999-020707

hbwhelp@micrel.com or (408) 955-1690

DESCRIPTION

■ Provides six ultra-low skew copies of the selected

input

■ 2:1 MUX input included for clock switchover

applications

■ Guaranteed AC performance over temperature and

voltage:

•Clock frequency range: DC to > 4.5GHz

• <20ps skew (output-to-output)

■ Ultra-low jitter design:

■ Low supply voltage operation: 2.5V and 3.3V

■ Unique input termination and VT pin accepts DC-

coupled and AC-coupled inputs (CML, PECL, LVDS)

■ Unique input isolation design minimizes crosstalk

■ 100K LVPECL compatible output swing

■ Available in 32-pin (5mm ×

×

×

×

FEATURES

4.5GHz, 1:6 LVPECL FANOUT

BUFFER WITH 2:1 MUX INPUT

AND INTERNAL TERMINATION

SY58035U

APPLICATIONS

■ Redundant clock distribution

■ All SONET/SDH clock/data distribution

■ All Fibre Channel distribution

■ All Gigabit Ethernet clock distribution

The SY58035U is a 2.5V/3.3V precision, high-speed, 1:6

fanout capable of handling clocks up to 4.5GHz. A differential

2:1 MUX input is included for redundant clock switchover

applications.

The differential input includes Micrel’s unique, 3-pin input

termination architecture that allows the device to interface

to any differential signal (AC- or DC-coupled) as small as

100mV without any level shifting or termination resistor

networks in the signal path. The outputs are LVPECL (100K,

temperature compensated), with extremely fast rise/fall times

guaranteed to be less than 110ps.

The SY58035U operates from a 2.5V ±5% supply or a

3.3V ±10% supply and is guaranteed over the full industrial

temperature range of –40°C to +85°C. For applications that

require CML outputs, consider the SY58034U or for 400mV

LVPECL outputs the SY58036U. The SY58035U is part of

All support documentation can be found on Micrel’s web

site at www.micrel.com.

FUNCTIONAL BLOCK DIAGRAM

Precision Edge is a registered trademark of Micrel, Inc.

MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.

Q0

/Q0

Q1

/Q1

Q2

/Q2

Q3

/Q3

Q4

/Q4

Q5

/Q5

IN0

/IN0

50Ω

50Ω

IN1

/IN1

50Ω

50Ω

0

1

Mux

SEL

(TTL/CMOS)

S

2:1 Mux

1:6 Fanout

Rev.: D

Amendment: /0

Issue Date:

February 2007