AAT1151

850kHz 700mA Synchronous

Buck DC/DC Converter

2

1151.2007.01.1.6

Pin Descriptions

Pin Configuration

MSOP-8

QFN33-16

(Top view)

(Top view)

VP

VP

VP

PGND

PGND

PGND

1

2

3

4

12

11

10

9

VCC

FB

LX

PGND

LX

VP

FB

SGND

EN

VCC

1

2

3

4

8

7

6

5

Pin #

MSOP-8

QFN33-16

Symbol

Function

1

4

FB

Feedback input pin. This pin is connected to the converter output. It

is used to set the output of the converter to regulate to the desired

value via an internal resistive divider. For an adjustable output, an

external resistive divider is connected to this pin on the 1V model.

2

5, 6

SGND

Signal ground. Connect the return of all small signal components to

this pin. (See board layout rules.)

3

7

EN

Enable input pin. A logic high enables the converter; a logic low

forces the AAT1151 into shutdown mode reducing the supply current

to less than 1μA. The pin should not be left floating.

4

9

VCC

Bias supply. Supplies power for the internal circuitry. Connect to input

power via low pass filter with decoupling to SGND.

5

10, 11, 12

VP

Input supply voltage for the converter power stage. Must be closely

decoupled to PGND.

6, 7

13, 14, 15

LX

Connect inductor to these pins. Switching node internally connected

to the drain of both high- and low-side MOSFETs.

8

1, 2, 3

PGND

Main power ground return pin. Connect to the output and input

capacitor return. (See board layout rules.)

8, 16

NC

Not internally connected.

EP

Exposed paddle (bottom); connect to PGND directly beneath package.