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NLSF1174MNR2G Datasheet(PDF) 4 Page - ON Semiconductor |
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NLSF1174MNR2G Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 6 page NLSF1174 http://onsemi.com 4 TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns) Parameter Figure Symbol VCC V Guaranteed Limit Unit *555C to 255C v855C v1255C Min Max Min Max Min Max Minimum Setup Time, Data to Clock 6 tsu 2.0 4.5 6.0 50 10 9.0 65 13 11 75 15 13 ns Minimum Hold Time, Clock to Data 6 th 2.0 4.5 6.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 ns Minimum Recovery Time, Reset Inactive to Clock 5 trec 2.0 4.5 6.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 ns Minimum Pulse Width, Clock 4 tw 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns Minimum Pulse Width, Reset 5 tw 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns Maximum Input Rise and Fall Times 4 tr, tf 2.0 4.5 6.0 1000 500 400 1000 500 400 1000 500 400 ns CLOCK D0 RESET D1 D2 D3 D4 D5 C Q D R Q0 Q1 Q2 Q3 Q4 Q5 Figure 3. Expanded Logic Diagram C Q D R C Q D R C Q D R C Q D R C Q D R |
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