NSTB1005DXV5_04 datasheet(1/6 Pages) ONSEMI

Part #	NSTB1005DXV5

Description	Dual Common Base-Collector Bias Resistor Transistors

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March, 2004 − Rev. 0

1

Publication Order Number:

NSTB1005DXV5/D

NSTB1005DXV5T1,

NSTB1005DXV5T5

Preferred Devices

Dual Common

Base−Collector Bias

Resistor Transistors

NPN and PNP Silicon Surface Mount

Transistors with Monolithic Bias

Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with

a monolithic bias network consisting of two resistors; a series base

resistor and a base−emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias

network. The BRT eliminates these individual components by

integrating them into a single device. The NSTB1005DXV5T1

contains two complementary BRT devices are housed in the SOT−553

package which is ideal for low power surface mount applications

where board space is at a premium.

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• Available in 8 mm, 7 inch Tape and Reel

• Lead Free

MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1

and Q2, − minus sign for Q1 (PNP) omitted)

Rating

Symbol

Value

Unit

Collector-Base Voltage

VCBO

50

Vdc

Collector-Emitter Voltage

VCEO

50

Vdc

Collector Current

IC

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

(One Junction Heated)

Symbol

Max

Unit

Total Device Dissipation

TA = 25°C

Derate above 25

°C

PD

357 (Note 1)

2.9 (Note 1)

mW

mW/

°C

Thermal Resistance −

Junction-to-Ambient

RqJA

350 (Note 1)

°C/W

Characteristic

(Both Junctions Heated)

Symbol

Max

Unit

Total Device Dissipation

TA = 25°C

Derate above 25

°C

PD

500 (Note 1)

4.0 (Note 1)

mW

mW/

°C

Thermal Resistance −

Junction-to-Ambient

RqJA

250 (Note 1)

°C/W

Junction and Storage Temperature

TJ, Tstg

− 55 to +150

°C

1. FR−4 @ Minimum Pad

MARKING DIAGRAM

Preferred devices are recommended choices for future use

and best overall value.

45

Q1

Q2

R1

R2

31

2

http://onsemi.com

SOT−553

CASE 463B

UC D

1

5

1

5

UC = Specific Device Code

D

= Date Code

Device

Package

Shipping†

ORDERING INFORMATION

NSTB1005DXV5T1 SOT−553

4 mm pitch

4000/Tape & Reel

NSTB1005DXV5T5 SOT−553

2 mm pitch

8000/Tape & Reel

R2

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

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