NE570

http://onsemi.com

5

BASIC CIRCUIT HOOK−UP AND OPERATION

Figure 5 shows the block diagram of one half of the chip,

(there are two identical channels on the IC). The full−wave

variable gain (

DG) cell. The output of theDG cell is a current

which is fed to the summing node of the operational

amplifier. Resistors are provided to establish circuit gain and

set the output DC bias.

7, 10

OUTPUT

−

+

DG

20 k

W

1.8 V

5, 12

INV. IN

R3

6, 11

20 k

W

30 k

W

GND: PIN 4

1, 16

8, 9

THD_TRIM

10 k

W

RECT_IN

2, 15

3, 14

DG_CELL_IN

Figure 5. Chip Block Diagram (1 of 2 Channels)

The circuit is intended for use in single power supply

systems, so the internal summing nodes must be biased at

some voltage above ground. An internal band gap voltage

reference provides a very stable, low noise 1.8 V reference

Figure 6 shows how the circuit is hooked up to realize an

both the rectifier and the

DG cell. When the input signal

drops by 6.0 dB, the gain control current will drop by a factor

will thus drop 12 dB, giving us the desired 2−to−1

expansion.

−

+

DG

* EXTERNAL COMPONENTS

GAIN =

NOTES:

Figure 6. Basic Expander

2

Figure 7 shows the hook−up for a compressor. This is

essentially an expander placed in the feedback loop of the op

amp. The

DG cell is set−up to provide AC feedback only, so

output of the op amp. The output will bias to:

V

1

)

R

R

4

V

REF

V

1

)

R

DC TOT

30 k

W

1.8 V

The output of the expander will bias up to:

V

1

)

R

3

R

4

V

REF

V

1

) 20 kW

30 k

W

1.8 V

+ 3.0 V

The output will bias to 3.0 V when the internal resistors

are used. External resistors may be placed in series with R3,

(which will affect the gain), or in parallel with R4 to raise the

DC bias to any desired value.

−

+

DG

* EXTERNAL COMPONENTS

GAIN =

NOTES:

Figure 7. Basic Compressor

R1 R2 IB

2R3 VIN(avg.)

1

2