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AT43USB353M Datasheet(PDF) 66 Page - ATMEL Corporation |
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AT43USB353M Datasheet(HTML) 66 Page - ATMEL Corporation |
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66 / 95 page  66 AT43USB353M 3307B–USB–4/04 Identifies DATA0 or DATA1 packets. This bit will automatically toggle and requires clearing by the firmware only in certain special circumstances. • Bit 2 – EPDIR: End-point Direction 0 = Out 1 = In • Bit 1, 0 – EPTYPE: End-point Type These bits programs the type of end-point. Hub End-point 0 Data Register – HDR0 Function End-point 0..3 Data Register – FDR0..3 This register is used to read data from or to write data to the Hub End-point 0 FIFO. • Bit 7..0 – FDAT7..0: FIFO Data Hub End-point 1 has a single byte data register instead of a FIFO. This data register contains the hub and port status change bitmap. This data register is automatically updated by the USB hardware and is not accessible by the firmware. The bits in this register when read by the host will be: • Bit 7...4 – Reserved These bits are reserved in the AT43USB353M and will read as zero. • Bit 3 – P3 SC: Port 3 Status Change • Bit 2 – P2 SC: Port 2 Status Change • Bit 1 – P1 SC: Port 1 Status Change • Bit 0 – H SC: Hub Status Change Bit1 Bit0 Type 0 1 Isochronous 10 Bulk 1 1 Interrupt Bit 7 654 3 2 1 0 $1FD7 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 HDR0 $1FD5 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 FDR0 $1FD4 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 FDR1 $1FD3 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 FDR2 $1FD2 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 FDR3 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 $ – – – – P3 SC P2 SC P1 SC H SC HDR1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
Similar Part No. - AT43USB353M_04 |
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Similar Description - AT43USB353M_04 |
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