Table 7. Read Status Register Bit Definition

Bit 0 (RDY)

Bit 0 = “0” (RDY) indicates the device is READY. Bit 0 = “1” indicates the

write cycle is in progress.

Bit 1 (WEN)

Bit 1 = “0” indicates the device is not WRITE ENABLED. Bit 1 = “1”

indicates the device is WRITE ENABLED.

Bit 2 (BP0)

See Table 8.

Bit 3 (BP1)

See Table 8.

Bit 4 (BP2)

See Table 8.

Bits 5-6 are 0s when device is not in an internal write cycle.

Bit 7 (WPEN)

See Table 9.

Bits 0-7 are 1s during an internal write cycle.

8

AT25F4096

2454G–SFLSH–5/06

READ PRODUCT ID (RDID): The RDID instruction allows the user to read the manufac-

turer and product ID of the device. The first byte after the instruction will be the

manufacturer code (1FH = ATMEL), followed by the device code 64H.

WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select

one of five levels of protection for the AT25F4096. The AT25F4096 is divided into eight

sectors where the top 1/8, top quarter (1/4), top half (1/2), or all of the memory sectors

can be protected (locked out) from write. Any of the locked-out sectors will therefore be

read only. The locked-out sector and the corresponding status register control bits are

shown in Table 8 on page 8.

The four bits, BP0, BP1, BP2 and WPEN, are nonvolatile cells that have the same prop-

erties and functions as the regular memory cells (e.g., WREN, t

Note:

1. x = don’t care

The WRSR instruction also allows the user to enable or disable the write protect (WP)

pin through the use of the write protect enable (WPEN) bit. Hardware write protection is

enabled when the WP pin is low and the WPEN bit is “1”. Hardware write protection is

disabled when either the WP pin is high or the WPEN bit is “0.” When the device is hard-

ware write protected, writes to the status register, including the block protect bits and the

WPEN bit, and the locked-out sectors in the memory array are disabled. Write is only

allowed to sectors of the memory which are not locked out. The WRSR instruction is

self-timed to automatically erase and program BP0, BP1, BP2 and WPEN bits. In order

Bit

Definition

Table 8. Block Write Protect Bits

Level

Status Register Bits

AT25F4096

BP2

BP1

BP0

Array Addresses

Locked Out

Locked-out Sector(s)

0(none)

0

0

0

None

None

1(1/8)

0

0

1

070000 - 07FFFF

Sector 8

2(1/4)

0

1

0

060000 - 07FFFF

Sector 7, 8

3(1/2)

0

1

1

040000 - 07FFFF

Sector 5, 6, 7, 8

4(all)

1

x

x

000000 - 07FFFF

All sectors

(1 - 8)