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AT89S52-24AU Datasheet(PDF) 27 Page - ATMEL Corporation |
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AT89S52-24AU Datasheet(HTML) 27 Page - ATMEL Corporation |
27 / 39 page 27 1919C–MICRO–3/05 AT89S52 Note: 1. B1 = 0, B2 = 0 ---> Mode 1, no lock protection B1 = 0, B2 = 1 ---> Mode 2, lock bit 1 activated B1 = 1, B2 = 0 ---> Mode 3, lock bit 2 activated B1 = 1, B2 = 1 ---> Mode 4, lock bit 3 activated After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster than 1/16 of the system clock at XTAL1. For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are shifted in/out. Then the next instruction will be ready to be decoded. Table 24-1. Serial Programming Instruction Set Instruction Instruction Format Operation Byte 1 Byte 2 Byte 3 Byte 4 Programming Enable 1010 1100 0101 0011 xxxx xxxx xxxx xxxx 0110 1001 (Output on MISO) Enable Serial Programming while RST is high Chip Erase 1010 1100 100x xxxx xxxx xxxx xxxx xxxx Chip Erase Flash memory array Read Program Memory (Byte Mode) 0010 0000 xxx Read data from Program memory in the byte mode Write Program Memory (Byte Mode) 0100 0000 xxx Write data to Program memory in the byte mode Write Lock Bits (1) 1010 1100 1110 00 xxxx xxxx xxxx xxxx Write Lock bits. See Note (1). Read Lock Bits 0010 0100 xxxx xxxx xxxx xxxx xxx xx Read back current status of the lock bits (a programmed lock bit reads back as a “1”) Read Signature Bytes 0010 1000 xxx xxx xxx0 Signature Byte Read Signature Byte Read Program Memory (Page Mode) 0011 0000 xxx Byte 0 Byte 1... Byte 255 Read data from Program memory in the Page Mode (256 bytes) Write Program Memory (Page Mode) 0101 0000 xxx Byte 0 Byte 1... Byte 255 Write data to Program memory in the Page Mode (256 bytes) } Eachofthelockbitmodesneedstobeactivatedsequentially before Mode 4 can be executed. |
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