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AT89S52-24AC Datasheet(PDF) 23 Page - ATMEL Corporation |
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AT89S52-24AC Datasheet(HTML) 23 Page - ATMEL Corporation |
23 / 39 page 23 1919C–MICRO–3/05 AT89S52 22. Programming Interface – Parallel Mode Every code byte in the Flash array can be programmed by using the appropriate combination of control signals. The write operation cycle is self-timed and once initiated, will automatically time itself to completion. Most major worldwide programming vendors offer support for the Atmel AT89 microcontroller series. Please contact your local programming vendor for the appropriate software revision. Notes: 1. Each PROG pulse is 200 ns - 500 ns for Chip Erase. 2. Each PROG pulse is 200 ns - 500 ns for Write Code Data. 3. Each PROG pulse is 200 ns - 500 ns for Write Lock Bits. 4. RDY/BSY signal is output on P3.0 during programming. 5. X = don’t care. Table 22-1. Flash Programming Modes Mode VCC RST PSEN ALE/ PROG EA/ VPP P2.6 P2.7 P3.3 P3.6 P3.7 P0.7-0 Data P2.4-0 P1.7-0 Address Write Code Data 5V H L (2) 12V L HHHH DIN A12-8 A7-0 Read Code Data 5V H L H H L L L H H D OUT A12-8 A7-0 Write Lock Bit 1 5V H L (3) 12V HHHHH X X X Write Lock Bit 2 5V H L (3) 12V H H H L L X X X Write Lock Bit 3 5V H L (3) 12V H L H H L X X X Read Lock Bits 1, 2, 3 5V H L H H H H L H L P0.2, P0.3, P0.4 XX Chip Erase 5V H L (1) 12V HL HL L X X X Read Atmel ID 5V H L H H LLLLL 1EH X 0000 00H Read Device ID 5V H L H H LLLLL 52H X 0001 00H Read Device ID 5V H L H H LLLLL 06H X 0010 00H |
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