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NCP5331 Datasheet(PDF) 1 Page - ON Semiconductor |
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NCP5331 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 36 page © Semiconductor Components Industries, LLC, 2005 March, 2005 − Rev. 12 1 Publication Order Number: NCP5331/D NCP5331 Two−Phase PWM Controller with Integrated Gate Drivers The NCP5331 is a second−generation, two−phase, buck controller that incorporates advanced control functions to power 64−bit AMD Athlon t processors and low voltage, high current power supplies. Proprietary multiphase architecture guarantees balanced load−current sharing, reduces output voltage and input current ripple, decreases filter requirements and inductor values, and increases output current slew rate. Traditional Enhanced V2 t has been combined with an internal PWM ramp and voltage feedback directly from VCORE to the internal PWM comparator. These features and enhancements deliver the fastest transient response, reduce output voltage jitter, provide greater design flexibility and portability, and minimize overall solution cost. Advanced features include adjustable power−good delay, programmable overcurrent shutdown timer, superior overvoltage protection (OVP), and differential remote sensing. An innovative overvoltage protection (OVP) scheme safeguards the CPU during extreme situations including power up with a shorted upper MOSFET, shorting of an upper MOSFET during normal operation, and loss of the voltage feedback signal, COREFB+. Features • Reduced SMT Package Size (7 mm × 7 mm) • Enhanced V2 Control Method • Four On−Board Gate Drivers • Internal PWM Ramps • Differential Remote Voltage Sense • Fast Feedback Pin (V FFB) • 5−Bit DAC with 0.8% System Tolerance • Timed Hiccup Mode Current Limit • Power Good Output with Programmable Delay • Advanced Overvoltage Protection (OVP) • Adjustable Output Voltage Positioning • 150 kHz to 600 kHz Operation Set by Resistor • “Lossless” Current Sensing through Output Inductors • Independent Current Sense Amplifiers • 5.0 V, 2 mA Reference Output • Pb−Free Package is Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week x = G or G MARKING DIAGRAMS LQFP−32 FT SUFFIX CASE 873A NCP5331 AWLYYWWx ORDERING INFORMATION NCP5331FTR2 LQFP−32 2000 Tape & Reel Device Package Shipping† 32 1 *Pb−Free indicator, “G” or microdot “ G”, may or may not be present. NCP5331FTR2G LQFP−32 (Pb−Free) 2000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. |
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