NCP5201MNR2G datasheet(8/9 Pages) ONSEMI

Part #	NCP5201MNR2G

Description	Dual Output DDR Power Controller

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Manufacturer	ONSEMI [ON Semiconductor]

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NCP5201

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8

VSTBY

S3_EN

VCC

VDDQ

VTT

PWRGD

Operating

Mode

Soft−Start

tss1

thold ∼ 200 ms

VTT in H−Z

thold ∼ 200 ms

S0

S3

S0

S5

VSTGD goes HIGH

12 VGD goes HIGH,

VDDQ is activated

INREGDDQ goes HIGH,

VTT is activated

INREGVTT goes HIGH

S3_EN goes HIGH,

VTT goes into standby

mode, then INREGVTT

goes LOW, PWRGD

goes LOW, then or VCC

or 5 VCC goes LOW

triggering VDDQ going

into standby mode.

INREGVTT

goes HIGH

VCC goes LOW;

VDDQ is disabled, then

INREGDDQ goes LOW,

PWRGD goes LOW

S3_EN goes LOW,

VDDQ is in normal

mode, INREGDDQ

goes HIGH, then VTT

goes into normal mode

S5

Figure 3. Power−Up and Power−Down Timing Diagram

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ON Semiconductor	NCP5201MNR2	69Kb / 10P	Dual Output DDR Power Controller September, 2004 ??Rev. 9

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NCP5201MNR2G Datasheet(PDF) 8 Page - ON Semiconductor

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