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ATTINY44V-10PU Datasheet(PDF) 5 Page - ATMEL Corporation |
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ATTINY44V-10PU Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 21 page 5 8006FS–AVR–02/07 ATtiny24/44/84 2.2 Pin Descriptions 2.2.1 VCC Supply voltage. 2.2.2 GND Ground. 2.2.3 Port B (PB3...PB0) Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability except PB3 which has the RESET capability. To use pin PB3 as an I/O pin, instead of RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny24/44/84 as listed on Section 12.3 ”Alternate Port Functions” on page 61. 2.2.4 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in Table 22-3 on page 183. Shorter pulses are not guaranteed to generate a reset. 2.2.5 Port A (PA7...PA0) Port A is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A has an alternate functions as analog inputs for the ADC, analog comparator, timer/counter, SPI and pin change interrupt as described in ”Alternate Port Functions” on page 61 3. Resources A comprehensive set of development tools, drivers and application notes, and datasheets are available for download on http://www.atmel.com/avr. |
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