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NCP1014AP100 Datasheet(PDF) 9 Page - ON Semiconductor |
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NCP1014AP100 Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 24 page NCP1010, NCP1011, NCP1012, NCP1013, NCP1014 http://onsemi.com 9 Figure 14. The Charge/Discharge Cycle Over a 10 mFVCC Capacitor Vcc 8.5 V 7.5 V Device Internally Pulses Startup Period 8.00 6.00 4.00 2.00 0 The protection burst duty--cycle can easily be computed through the various timing events as portrayed by Figure 16. Being loaded by the circuit consumption, the voltage on the VCC capacitor goes down. When the DSS controller detects that VCC has reached 7.5 V (VCCON), it activates the internal current source to bring VCC toward 8.5 V and stops again: a cycle takes place whose low frequency depends on the VCC capacitor and the IC consumption. A 1.0 V ripple takes place on the VCC pin whose average value equals (VCCOFF +VCCON)/2. Figure 14 portrays a typical operation of the DSS. As one can see, the VCC capacitor shall be dimensioned to offer an adequate startup time, i.e. ensure regulation is reached before VCC crosses 7.5 V (otherwise the part enters the fault condition mode). If we know that ΔV=1.0 V and ICC1 (max) is 1.1 mA (for instance we selected an 11 Ω device switching at 65 kHz), then the VCC capacitor can be calculated using: C ≥ ICC1 · tstartup ΔV (eq. 1) .Let’s suppose that the SMPS needs 10 ms to startup, then we will calculate C to offer a 15 ms period. As a result, C should be greater than 20 mF thus the selection of a 33 mF/16 V capacitor is appropriate. Short Circuit Protection The internal protection circuitry involves a patented arrangement that permanently monitors the assertion of an internal error flag. This error flag is, in fact, a signal that instructs the controller that the internal maximum peak current limit is reached. This naturally occurs during the startup period (Vout is not stabilized to the target value) or when the optocoupler LED is no longer biased, e.g. in a short--circuit condition or when the feedback network is broken. When the DSS normally operates, the logic checks for the presence of the error flag every time VCC crosses VCCON. If the error flag is low (peak limit not active) then the IC works normally. If the error signal is active, then the NCP101X immediately stops the output pulses, reduces its internal current consumption and does not allow the startup source to activate: VCC drops toward ground until it reaches the so--called latch--off level, where the current source activates again to attempt a new restart. When the error is gone, the IC automatically resumes its operation. If the default is still there, the IC pulses during 8.5 V down to 7.5 V and enters a new latch--off phase. The resulting burst operation guarantees a low average power dissipation and lets the SMPS sustain a permanent short--circuit. Figure 15 shows the corresponding diagram. Figure 15. Simplified NCP101X Short--Circuit Detection Circuitry -- + 4V FB Division Max Ip Flag VCC VCCON Signal To Latch Reset Current Sense Information Clamp Active? |
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