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AD600AR Datasheet(PDF) 11 Page - Analog Devices |
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AD600AR Datasheet(HTML) 11 Page - Analog Devices |
11 / 28 page AD600/AD602 Rev. E | Page 11 of 28 It is apparent from the foregoing that it is essential to use a low resistance in the design of the ladder network to achieve low noise. In some applications, this can be inconvenient, requiring the use of an external buffer or preamplifier. However, very few amplifiers combine the needed low noise with low distortion at maximum input levels, and the power consumption required to achieve this performance is quite high (due to the need to maintain very low resistance values while also coping with large inputs). On the other hand, there is little value in providing a buffer with high input impedance, because the usual reason for this—the minimization of loading of a high resistance source— is not compatible with low noise. Apart from the small variations just mentioned, the SNR at the output is essentially independent of the attenuator setting, because the maximum undistorted output is 1 V rms and the NSD at the output of the AD600 is fixed at 113 × 114 nV/√Hz, or 158 nV/√Hz. Therefore, in a 1 MHz bandwidth, the output SNR is 76 dB. The input NSD of the AD600/AD602 are the same, but because of the 10 dB lower gain in the AD602’s fixed amplifier, its output SNR is 10 dB better, or 86 dB in a 1 MHz bandwidth. THE GAIN-CONTROL INTERFACE The attenuation is controlled through a differential, high impedance (15 MΩ) input, with a scaling factor that is laser trimmed to 32 dB per volt, that is, 31.25 mV/dB. Each of the two amplifiers has its own control interface. An internal band gap reference ensures stability of the scaling with respect to supply and temperature variations and is the only circuitry common to both channels. When the differential input voltage VG = 0 V, the attenuator slider is centered, providing an attenuation of +21.07 dB, resulting in an overall gain of +20 dB (= –21.07 dB + +41.07 dB). When the control input is −625 mV, the gain is lowered by +20 dB (= +0.625 × +32) to 0 dB; when set to +625 mV, the gain is increased by +20 dB to +40 dB. When this interface is overdriven in either direction, the gain approaches either −1.07 dB (= −42.14 dB + +41.07 dB) or +41.07 dB (= 0 + +41.07 dB), respectively. The gain of the AD600 can be calculated by Gain (dB) = 32 VG + 20 (1) where VG is in volts. For the AD602, the expression is Gain (dB) = 32 VG + 10 (2) Operation is specified for VG in the range from −625 mV dc to +625 mV dc. The high impedance gain-control input ensures minimal loading when driving many amplifiers in multiple- channel applications. The differential input configuration provides flexibility in choosing the appropriate signal levels and polarities for various control schemes. For example, the gain-control input can be fed differentially to the inputs or single-ended by simply grounding the unused input. In another example, if the gain is controlled by a DAC providing a positive-only, ground-referenced output, the gain control LO pin (either C1LO or C2LO) should be biased to a fixed offset of 625 mV to set the gain to 0 dB when gain control HI (C1HI or C2HI) is at zero and to set the gain to 40 dB when at 1.25 V. It is a simple matter to include a voltage divider to achieve other scaling factors. When using an 8-bit DAC with an FS output of 2.55 V (10 mV/bit), a 1.6 divider ratio (generating 6.25 mV/bit) results in a gain setting resolution of 0.2 dB/bit. Later in this data sheet, cascading the two sections of an AD600 or AD602 when various options exist for gain control is explained (see the Achieving 80 DB Gain Range section.) SIGNAL-GATING INPUTS Each amplifier section of the AD600/AD602 is equipped with a signal gating function, controlled by a TTL or CMOS logic input (GAT1 or GAT2). The ground references for these inputs are the signal input grounds A1LO and A2LO, respectively. Operation of the channel is unaffected when this input is LO or left open-circuited. Signal transmission is blocked when this input is HI. The dc output level of the channel is set to within a few millivolts of the output ground (A1CM or A2CM) and simultaneously the noise level drops significantly. The reduction in noise and spurious signal feedthrough is useful in ultrasound beam-forming applications, where many amplifier outputs are summed. COMMON-MODE REJECTION A special circuit technique provides rejection of voltages appearing between input grounds (A1LO and A2LO) and output grounds (A1CM and A2CM). This is necessary because of the op amp form of the amplifier, as shown in Figure 21. The feedback voltage is developed across the RF1 resistor (which, to achieve low noise, has a value of only 20 Ω). The voltage developed across this resistor is referenced to the input common, so the output voltage is also referred to that node. For zero differential signal input between A1HI and A1LO, the output A1OP simply follows the voltage at A1CM. Note that the range of voltage differences that can exist between A1LO and A1CM (or A2LO and A2CM) is limited to about ±100 mV. Figure 18 shows the typical common-mode rejection ratio vs. frequency. |
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