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ADT7302ARTZ-REEL7 Datasheet(PDF) 11 Page - Analog Devices |
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ADT7302ARTZ-REEL7 Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page ADT7302 Rev. 0 | Page 11 of 16 Write Operation Figure 14 also shows the timing diagram for a serial write to the ADT7302. The write operation takes place at the same time as the read operation. Only the third bit in the data stream provides a user-controlled function. This third bit is the power-down bit, which, when set to 1, puts the ADT7302 into shutdown mode. In addition to the power-down bit, all bits in the input data stream should be 0 to ensure correct operation of the ADT7302. Data is loaded into the control register on the 16th rising SCLK edge; the data takes effect at this time. Therefore, if the part is programmed to go into shutdown, it does so at this point. If CS is brought high before this 16th SCLK edge, the control register is not loaded and the power-down status of the part does not change. Data is clocked into the ADT7302 on the rising edge of SCLK. |
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