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ATMEGA64 Datasheet(PDF) 18 Page - ATMEL Corporation |
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ATMEGA64 Datasheet(HTML) 18 Page - ATMEL Corporation |
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18 / 23 page 
18 ATmega64(L) 2490LS–AVR–10/06 4. Stabilizing time needed when changing OSCCAL Register After increasing the source clock frequency more than 2% with settings in the OSC- CAL register, the device may execute some of the subsequent instructions incorrectly. Problem Fix / Workaround The behavior follows errata number 1., and the same Fix / Workaround is applicable on this errata. 5. IDCODE masks data from TDI input The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are replaced by all-ones during Update-DR. Problem Fix / Workaround – If ATmega64 is the only device in the scan chain, the problem is not visible. – Select the Device ID Register of the ATmega64 by issuing the IDCODE instruction or by entering the Test-Logic-Reset state of the TAP controller to read out the contents of its Device ID Register and possibly data from succeeding devices of the scan chain. Issue the BYPASS instruction to the ATmega64 while reading the Device ID Registers of preceding devices of the boundary scan chain. – If the Device IDs of all devices in the boundary scan chain must be captured simultaneously, the ATmega64 must be the fist device in the chain. |
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