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NCP565D2T12R4 Datasheet(PDF) 9 Page - ON Semiconductor |
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NCP565D2T12R4 Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 16 page NCP565/NCV565 http://onsemi.com 9 PCB Layout Considerations Good PCB layout plays an important role in achieving good load transient performance. Because it is very sensitive to its PCB layout, particular care has to be taken when tackling Printed Circuit Board (PCB) layout. The figures below give an example of a layout where parasitic elements are minimized. For microprocessor applications it is customary to use an output capacitor network consisting of several capacitors in parallel. This reduces the overall ESR and reduces the instantaneous output voltage drop under transient load conditions. The output capacitor network should be as close as possible to the load for the best results. The schematic of NCP565 typical application circuit, which this PCB layout is base on, is shown in Figure 19. The output voltage is set to 3.3 V for this demonstration board according to the feedback resistors in the Table 1. Figure 19. Schematic of NCP565 Typical Application Circuit Vin Vout NCP565 GND Adj C1 150 m R2 15.8 k Vout Vin GND C2 150 m NC C4 10 m C3 150 m GND C3 150 m C6 5.6 p R1 42.2 k 2 1 3 5 4 Figure 20. Top Layer |
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