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CGA-6618 Datasheet(PDF) 6 Page - SIRENZA MICRODEVICES

Part No. CGA-6618
Description  Dual CATV 1 MHz to 1000 MHz High Linearity GaAs HBT Amplifier
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Maker  SIRENZA [SIRENZA MICRODEVICES]
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CGA-6618 Datasheet(HTML) 6 Page - SIRENZA MICRODEVICES

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CGA-6618 Dual GaAs HBT Amplifier
EDS-101994 Rev J
303 S. Technology Ct., Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
Basic Application Schematic 50-870 MHz
Evaluation Board Layout 50-870 MHz
1
2
3
4
8
7
6
5
ECB-101611 Rev A
ESOP-8
Push-Pull
Eval Board
RF OUTPUT
RF INPUT
.01uF
1000pF
68pF
220nH
220nH
68pF
1000pF
.01uF
1000pF
1000pF
1000pF
1000pF
Balun ETC1-1-13
Balun ETC1-1-13
Rbias
Rbias
1uF Tant.
1uF Tant.
CGA-6618
SOIC-08
1000 pF
0.01
µF 1000pF
68pF
Vs
RBIAS
Amp 1
1000 pF
1000 pF
1000 pF
220 nH
Macom
ETC1-1-13
Macom
ETC1-1-13
1
µF Tant.
1
µF Tant.
0.01
µF
1000pF
68pF
220 nH
Vs
RBIAS
Amp 2
1
4
8
5
6,7
2,3
PCB Recommendations
1. Solder the copper pad on the backside of the
device package to the ground plane.
2. Use a large ground pad area with many plated
through-holes as shown.
3. We recommend 1 or 2 ounce copper. Measurement
for this data sheet were made on a 31 mil thick FR-4
board with 1 ounce copper on both sides.
CGA-6618
CGA-6618Z
R eco mm en ded B ias R esistor Values fo r
I
D =1 50m A
R
BIAS =2 ( V S -V D ) / ID
S upply Voltage(V
S )
8 V
9 V
12 V
15 V
R
BIAS
33
47
82
120
Note: R
BIAS provi des D C bi as s tab i li ty over te m perature.
Part Number
Reel Size
Devices/Reel
CGA-6618
7"
500
CGA-6618Z
7"
500
Caution: ESD sensitive
Appropriate precautions in handling, packaging
and testing devices must be observed.
Part Number Ordering Information
Part Identification Marking
Pin #
Function
Description
Device Pin Out
1
RF IN
Device 1
RF input pin. This pin requires the use of an external DC blocking capacitor as shown in
the schematic.
2,3,6,7
Ground
Connection to ground. Use via holes for best performance to reduce lead inductance
as close to ground leads as possible.
4
RF IN
Device 2
Same as pin 1
5
RF OUT / Vcc
Device 2
RF output and bias pin. Bias should be supplied to this pin through an external series
resistor and RF choke inductor. Because DC biasing is present on this pin, a DC
blocking capacitor should be used in most applications (see application schematic). The
supply side of the bias network should be well bypassed.
8
RF OUT / Vcc
Device 1
Same as pin 5
EPAD
Ground
Exposed area on the bottom side of the package must be soldered to the ground plane
of the board for proper thermal and RF performance. Several vias should be located
under the EPAD as shown in the recommended land pattern on page 5.


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