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74AC109 Datasheet(PDF) 5 Page - Fairchild Semiconductor

Part No. 74AC109
Description  Dual JK Positive Edge-Triggered Flip-Flop
Download  12 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74AC109 Datasheet(HTML) 5 Page - Fairchild Semiconductor

 
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©1988 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74AC109, 74ACT109 Rev. 1.5
5
DC Electrical Characteristics for ACT
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
Symbol
Parameter
VCC
(V)
Conditions
TA = +25°C TA = –40°C to +85°C
Units
Typ.
Guaranteed Limits
VIH
Minimum HIGH
Level Input Voltage
4.5
VOUT = 0.1V or
VCC – 0.1V
1.5
2.0
2.0
V
5.5
1.5
2.0
2.0
VIL
Maximum LOW
Level Input Voltage
4.5
VOUT = 0.1V or
VCC – 0.1V
1.5
0.8
0.8
V
5.5
1.5
0.8
0.8
VOH
Minimum HIGH
Level Output
Voltage
4.5
IOUT = –50µA
4.49
4.4
4.4
V
5.5
5.49
5.4
5.4
VIN = VIL or VIH:
4.5
IOH = –24mA
3.86
3.76
5.5
IOH = –24mA
(4)
4.86
4.76
VOL
Maximum LOW
Level Output
Voltage
4.5
IOUT = 50µA
0.001
0.1
0.1
V
5.5
0.001
0.1
0.1
VIN = VIL or VIH:
4.5
IOL = 24mA
0.36
0.44
5.5
IOL = 24mA
(4)
0.36
0.44
IIN
Maximum Input
Leakage Current
5.5
VI = VCC, GND
±0.1
± 1.0
µA
ICCT
Maximum ICC/Input
5.5
VI = VCC – 2.1V
0.6
1.5
mA
IOLD
Minimum Dynamic
Output Current(5)
5.5
VOLD = 1.65V Max.
75
mA
IOHD
VOHD = 3.85V Min.
–75
mA
ICC
Maximum
Quiescent Supply
Current
5.5
VIN = VCC or GND
2.0
20.0
µA


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