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NB100LVEP56DT Datasheet(PDF) 8 Page - ON Semiconductor |
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NB100LVEP56DT Datasheet(HTML) 8 Page - ON Semiconductor |
8 / 10 page NB100LVEP56 http://onsemi.com 8 ORDERING INFORMATION Device Package Shipping† NB100LVEP56DT TSSOP−20* 75 Units / Rail NB100LVEP56DTG TSSOP−20* 75 Units / Rail NB100LVEP56DTR2 TSSOP−20* 2500 Tape & Reel NB100LVEP56DTR2G TSSOP−20* 2500 Tape & Reel NB100LVEP56MN QFN−24 92 Units / Rail NB100LVEP56MNG QFN−24 (Pb−Free) 92 Units / Rail NB100LVEP56MNR2 QFN−24 3000 Tape & Reel NB100LVEP56MNR2G QFN−24 (Pb−Free) 3000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *This package is inherently Pb−Free. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices |
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