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ZL50075GAC Datasheet(PDF) 51 Page - Zarlink Semiconductor Inc

Part # ZL50075GAC
Description  32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 2 Streams (8, 16, 32 or 64 Mbps), and 64 Inputs and 64 Outputs
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL50075GAC Datasheet(HTML) 51 Page - Zarlink Semiconductor Inc

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ZL50075
Data Sheet
51
Zarlink Semiconductor Inc.
Figure 12 - ST-Bus Frame Pulse and Clock Output Timing
Figure 13 - GCI Frame Pulse and Clock Output Timing
Note 1: CKi at 8 MHz, output clock source set to internal APLL. No jitter presented on the the Cki0 input.
Note 2: For 65.536 MHz output clock, the total loading on the output should not be larger than 10pF.
AC Electrical Characteristics - Output Clock Jitter Generation
No.
Characteristic
Max.
Units
Notes1,2
1
Jitter at CKO0-1 (8.192 MHz)
1050
ps-pp
2
Jitter at CKO0-1 (16.384 MHz)
1030
ps-pp
3
Jitter at CKO0-1 (32.768 MHz)
920
ps-pp
4
Jitter at CKO0-1 (65.536 MHz)
810
ps-pp
FPo0
tFPOH
tFPOS
tCKOP
CKo0
Output Frame Boundary
FPo0
tFPOH
tFPOS
tCKOP
CKo0
Output Frame Boundary


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