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ZL50074 Datasheet(PDF) 18 Page - Zarlink Semiconductor Inc |
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ZL50074 Datasheet(HTML) 18 Page - Zarlink Semiconductor Inc |
18 / 61 page ZL50074 Data Sheet 18 Zarlink Semiconductor Inc. Figure 3 - Output Bit Advancement Timing This programming feature is provided to assist in designs where per stream routing delays are significant and different. The OSBA bits in the Group Control Registers are used to set the bit-advancement for each of the corresponding serial output stream groups. Figure 3 illustrates the effect of the OSBA settings on the output timing. There are limitations when the ZL50074 is programmed to use CKi2 - 0 as the output stream clock source: • If the selected reference clock frequency is 65 MHz or 32 MHz, the granularity of the advancement is reduced to 1/2 the clock period. • If the selected reference clock frequency is 16 MHz or 8 MHz, bit advancement is not available and the output streams are driven at the nominal times. 6.0 Message Mode In Message Mode (MSG), microprocessor data can be broadcast to the output data streams on a per-channel basis. This feature is useful for transferring control and status information to external circuits or other TDM devices. For a given output channel, when the corresponding Per Channel Function (bits 31 - 29) in the Connection Memory are set to Message Mode (010), the Connection Memory’s lowest data byte (bits 7 - 0) is output in the timeslot. Refer to Section 12.1.1, Connection Memory Bit Functions, for programming details. Nominal 32/65 MHz Clock 7.6 ns (~3.8 ns at 65 Mbps) 15.2 ns (~7.6 ns at 65 Mbps) 22.8 ns (~11.4 ns at 65 Mbps) Nominal Output Bit Timing Level 1 Advance Level 2 Advance Level 3 Advance OSBA = 00 OSBA = 01 OSBA = 10 OSBA = 11 Nominal 16 MHz Clock Nominal 8 MHz Clock |
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