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MC9S08RD60 Datasheet(PDF) 100 Page - Freescale Semiconductor, Inc |
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MC9S08RD60 Datasheet(HTML) 100 Page - Freescale Semiconductor, Inc |
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100 / 234 page  Central Processor Unit (S08CPUV2)Central Processor Unit (S08CPUV2) MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11 100 Freescale Semiconductor CPX #opr8i CPX opr8a CPX opr16a CPX oprx16,X CPX oprx8,X CPX ,X CPX oprx16,SP CPX oprx8,SP Compare X (Index Register Low) with Memory (X) – (M) (CCR Updated But Operands Not Changed) –– IMM DIR EXT IX2 IX1 IX SP2 SP1 A3 B3 C3 D3 E3 F3 9ED3 9EE3 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 DAA Decimal Adjust Accumulator After ADD or ADC of BCD Values (A)10 U– – INH 72 1 DBNZ opr8a,rel DBNZA rel DBNZX rel DBNZ oprx8,X,rel DBNZ ,X,rel DBNZ oprx8,SP,rel Decrement and Branch if Not Zero Decrement A, X, or M Branch if (result) ≠ 0 DBNZX Affects X Not H –––––– DIR INH INH IX1 IX SP1 3B 4B 5B 6B 7B 9E6B dd rr rr rr ff rr rr ff rr 7 4 4 7 6 8 DEC opr8a DECA DECX DEC oprx8,X DEC ,X DEC oprx8,SP Decrement M ← (M) – 0x01 A ← (A) – 0x01 X ← (X) – 0x01 M ← (M) – 0x01 M ← (M) – 0x01 M ← (M) – 0x01 –– – DIR INH INH IX1 IX SP1 3A 4A 5A 6A 7A 9E6A dd ff ff 5 1 1 5 4 6 DIV Divide A ← (H:A)÷(X) H ← Remainder –––– INH 52 6 EOR #opr8i EOR opr8a EOR opr16a EOR oprx16,X EOR oprx8,X EOR ,X EOR oprx16,SP EOR oprx8,SP Exclusive OR Memory with Accumulator A ← (A ⊕ M) 0–– – IMM DIR EXT IX2 IX1 IX SP2 SP1 A8 B8 C8 D8 E8 F8 9ED8 9EE8 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 INC opr8a INCA INCX INC oprx8,X INC ,X INC oprx8,SP Increment M ← (M) + 0x01 A ← (A) + 0x01 X ← (X) + 0x01 M ← (M) + 0x01 M ← (M) + 0x01 M ← (M) + 0x01 –– – DIR INH INH IX1 IX SP1 3C 4C 5C 6C 7C 9E6C dd ff ff 5 1 1 5 4 6 JMP opr8a JMP opr16a JMP oprx16,X JMP oprx8,X JMP ,X Jump PC ← Jump Address –––––– DIR EXT IX2 IX1 IX BC CC DC EC FC dd hh ll ee ff ff 3 4 4 3 3 JSR opr8a JSR opr16a JSR oprx16,X JSR oprx8,X JSR ,X Jump to Subroutine PC ← (PC) + n (n = 1, 2, or 3) Push (PCL); SP ← (SP) – 0x0001 Push (PCH); SP ← (SP) – 0x0001 PC ← Unconditional Address –––––– DIR EXT IX2 IX1 IX BD CD DD ED FD dd hh ll ee ff ff 5 6 6 5 5 LDA #opr8i LDA opr8a LDA opr16a LDA oprx16,X LDA oprx8,X LDA ,X LDA oprx16,SP LDA oprx8,SP Load Accumulator from Memory A ← (M) 0–– – IMM DIR EXT IX2 IX1 IX SP2 SP1 A6 B6 C6 D6 E6 F6 9ED6 9EE6 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 LDHX #opr16i LDHX opr8a LDHX opr16a LDHX ,X LDHX oprx16,X LDHX oprx8,X LDHX oprx8,SP Load Index Register (H:X) from Memory H:X ← (M:M + 0x0001) 0–– – IMM DIR EXT IX IX2 IX1 SP1 45 55 32 9EAE 9EBE 9ECE 9EFE jj kk dd hh ll ee ff ff ff 3 4 5 5 6 5 5 Table 7-2. HCS08 Instruction Set Summary (Sheet 4 of 7) Source Form Operation Description Effect on CCR VH I N Z C |
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