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CAT1232LP Datasheet(PDF) 5 Page - Catalyst Semiconductor

Part # CAT1232LP
Description  5V and 3.3V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets
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Manufacturer  CATALYST [Catalyst Semiconductor]
Direct Link  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT1232LP Datasheet(HTML) 5 Page - Catalyst Semiconductor

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5
CAT1232LP/CAT1832
Doc. No. 25089, Rev. 0C
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
APPLICATION INFORMATION
SUPPLY VOLTAGE MONITOR
Reset Signal Polarity and Output Stage Structure
RESET is an active LOW signal. It is developed with an
open drain driver in the CAT1232LP. A pull-up resistor
is required, typical values are 10k
Ω to 50kΩ. The
CAT1832 uses a CMOS push-pull output stage for the
RESET.
RESET is an active High signal developed by a CMOS
push-pull output stage and is the logical opposite to
RESET.
Trip Point Tolerance Selection
The TOL input is used to select the VCC trip point
threshold. This selection is made connecting the TOL
input to ground or VCC. Connecting TOL to Ground
makes the VCC trip threshold 4.62V for the CAT1232LP
and 2.88V for the CAT1832.
Connecting TOL to VCC makes the VCC trip threshold
4.37V for the CAT1232LP and 2.55V for the CAT1832.
After VCC has risen above the trip point set by TOL,
RESET and
RESET remain active for a minimum time
period of 250ms.
On power-down, once VCC falls below the reset threshold
the RESET outputs will remain active and are guaranteed
valid down to a VCC level of 1.0V.
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Figure 1. Timing Diagram: Power Up
Figure 2. Timing Diagram: Power Down
VCCTP(MAX)
VCCTP
VCCTP(MIN)
VCC
RESET
RESET
tR
tRPU
VOH
VOL
VCCTP(MAX)
VCCTP
VCCTP(MIN)
VCC
RESET
RESET
tF
VOH
VOL
tRPD
Manual Reset Operation
Push-button input,
PBRST, allows the user to issue
reset signals. The pushbutton input is debounced and is
pulled high through an internal 40k
Ω resistor.
When
PBRST is held low for the minimum time of 20 ms,
both resets become active and remain active for a
minimum time period of 250ms after
PBRST returns
high.
No external pull-up resistor is required, since
PBRST is
pulled high by an internal 40k
Ω resistor.
PBRST can be driven from a TTL or CMOS logic line or
short-ed to ground with a mechanical switch.


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